CS42416-DQZR Cirrus Logic Inc, CS42416-DQZR Datasheet - Page 36

• Manufacturer Part Number: CS42416-DQZR
• Description: IC CODEC 6CH 110DB 192KHZ 64LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42416-DQZR

• Package / Case: 64-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 110
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 6
• Conversion Rate: 192 KSPs
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 2 ADC, 6 DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

36
4.6.2
SCL
SDA
SDA
SCL
I²C Mode
In I²C mode, SDA is a bidirectional data line. Data is clocked into and out of the part by the clock, SCL.
There is no CS pin. Pins AD0 and AD1 form the two least-significant bits of the chip address and should
be connected through a resistor to VLC or DGND as desired. The state of the pins is sensed while the
CS42416 is being reset.
The signal timings for a read and write cycle are shown in
defined as a falling transition of SDA while the clock is high. A Stop condition is a rising transition while
the clock is high. All other transitions of SDA occur while the clock is low. The first byte sent to the
CS42416 after a Start condition consists of a 7-bit chip address field and a R/W bit (high for a read, low
for a write). The upper 5 bits of the 7-bit address field are fixed at 10011. To communicate with a CS42416,
the chip address field, which is the first byte sent to the CS42416, should match 10011, followed by the
settings of the AD1 and AD0. The eighth bit of the address is the R/W bit. If the operation is a write, the
next byte is the Memory Address Pointer (MAP) which selects the register to be read or written. If the op-
eration is a read, the contents of the register pointed to by the MAP will be output. Setting the auto-incre-
ment bit in MAP allows successive reads or writes of consecutive registers. Each byte is separated by an
acknowledge bit. The ACK bit is output from the CS42416 after each input byte is read and is input to the
CS42416 from the microcontroller after each transmitted byte.
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown
in
dition. The following pseudocode illustrates an aborted write operation followed by a read operation.
START
Figure
Send start condition.
Send 10011xx0 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte, auto increment off.
Receive acknowledge bit.
Send stop condition, aborting write.
START
0
1
CHIP ADDRESS (WRITE)
0
1
1
0
CHIP ADDRESS (WRITE)
23, the write operation is aborted after the acknowledge for the MAP byte by sending a stop con-
1
0
2
0
1
0
3
2
1 AD1 AD0 0
1
4
3
1 AD1 AD0 0
5
4
6
5
7
6
ACK
8
7
Figure 23. Control Port Timing, I²C Read
Figure 22. Control Port Timing, I²C Write
9
INCR
ACK
8
10 11
6
INCR
9
5
MAP BYTE
12 13 14 15
10 11
6
4
MAP BYTE
5
3
12
4
2
13 14 15
1
3
16
0
2
ACK
STOP
17 18
1
START
16 17 18
0
ACK
19
1
20 21 22 23 24
CHIP ADDRESS (READ)
0
7
0
19
6
DATA
1
Figure 22
1 AD1 AD0 1
24 25
1
0
ACK
25
26
26 27 28
27 28
7
ACK
and
DATA +1
6
7
DATA
Figure
1
0
ACK
0
DATA +1
7
7
23. A Start condition is
DATA +n
6
0
1
DATA + n
7
0
ACK
0
STOP
CS42416
ACK
NO
STOP
DS602F1