EMC2300-AZC-TR SMSC, EMC2300-AZC-TR Datasheet - Page 18

• Manufacturer Part Number: EMC2300-AZC-TR
• Description: Industrial Temperature Sensors Auto Fan Contrllr Up to 4 Fans
• Manufacturer: SMSC

Specifications of EMC2300-AZC-TR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Revision 0.32 (06-23-08)
5.6
5.7
5.8
5.9
5.10
FIELD:
Bits:
Slave Device Time-Out
Stretching the SCLK Signal
SMBus Timing
Bus Reset Sequence
SMBus Alert Response Address
START
The
According to SMBus specification, v2.0 devices in a transfer can abort the transfer in progress and
release the bus when any single clock low interval exceeds 25ms (T
detected this condition must reset their communication and be able to receive a new START condition
no later than 35ms (T
Note: Some simple devices do not contain a clock low drive circuit; this simple kind of device typically
The
SCLK itself.
The SMBus Slave Interface complies with the SMBus AC Timing Specification. See the SMBus timing
diagram shown in the section titled
The SMBus Slave Interface will reset and return to the idle state upon a START field followed
immediately by a STOP field.
The
(register 7Ch bit 2) is set and one or more status events bits are high. The interrupt signal (INT#),
which can be enabled on either the PWM2 or TACH3 pins, can be used as the SMBALERT#. See the
section describing the
Pin on page 25
The device can signal the host that it wants to talk by pulling the SMBALERT# low, if a status bit is
set in one of the interrupt status registers and properly enabled onto the INT# pin. The host processes
the interrupt and simultaneously accesses all SMBALERT# devices through a modified Receive Byte
operation with the Alert Response Address (ARA).
The
and respond with its device address. The 7-bit device address provided by the
placed in the 7 most significant bits of the byte. The eighth bit can be a zero or one.
After acknowledging the slave address, the
by clearing the INT enable bit. If the condition that caused the interrupt remains, the Fan Control device
will reassert the SMBALERT# on the next monitoring cycle, provided the INT enable bit has been set
back to ‘1’ by software.
1
EMC2300
EMC2300
EMC2300
EMC2300
may reset its communications port after a start or stop condition
Table 5.4 Modified SMBus Receive Byte Protocol Response to ARA
RESPONSE
ADDRESS
supports the slave device timeout as per the SMBus Specification, v2.0.
supports stretching of the SCLK by other devices on the SMBus but will not stretch the
device, which pulled SMBALERT# low, will acknowledge the Alert Response Address
device responds to the SMBus Alert Response Address, 0001 100, if the INTEN bit
ALERT
for more details on interrupts.
7
TIMEOUT, MAX
Interrupt Status Registers on page 23
RD
1
).
DATASHEET
Section 9.2, "SMBus Interface," on page
ACK
18
1
EMC2300
Fan Control Device with High Frequency PWM and Temperature Monitors
device will disengage the SMBALERT# pull-down
EMC2300
ADDRESS
and the section describing the
8
SLAVE
TIMEOUT, MIN
76.
NACK
). Devices that have
EMC2300
1
SMSC EMC2300
Datasheet
device is
STOP
Interrupt
1