EMC2300-AZC-TR SMSC, EMC2300-AZC-TR Datasheet - Page 51

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EMC2300-AZC-TR

Manufacturer Part Number
EMC2300-AZC-TR
Description
Industrial Temperature Sensors Auto Fan Contrllr Up to 4 Fans
Manufacturer
SMSC
Datasheet

Specifications of EMC2300-AZC-TR

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
SMSC EMC2300
8.2.4
Register
Address
30h
31h
32h
Note
Note
Note
Read/
Write
The Fan Tachometer Reading registers contain the number of 11.111 μ s periods (90KHz) between full
fan revolutions. Fans produce two tachometer pulses per full revolution. These registers are updated
at least once every second.
To convert the value in the TACH reading registers to a representative RPM value is a simple
mathematical exercise. The 16bit reading is first converted to a decimal number and then multiplied
by the clock period (11.11
1 full fan revolution. This number is then inverted and multiplied by 60 to give Rotations / minute.
For example: If the Tach 1 data bytes contain 0C86h (MSB followed by LSB). This is equivalent to
3206 clock counts. Multiplying this number by 11.111
represents the measured time for two full periods of the TACH signal. Inverting this number and
multiplying it by 60 yields a final RPM value of 1684.
The larger the returned count, the slower the measured fan speed. The slowest fan speed that can be
stored is approximately 82RPM with an output code of FFFDh. This slow speed is not practical to
measure in TACH monitoring Mode 2 (see
RPM’s measured using Mode 2 and
‘ON’," on page 39
This value is represented for each fan in a 16 bit, unsigned number.
The Fan Tachometer Reading registers always return an accurate fan tachometer measurement, even
when a fan is disabled or non-functional, including when the start bit=0.
When one byte of a 16-bit register is read, the other byte latches the current value until it is read, in
order to ensure a valid reading. The order is LSB first, MSB second.
FFFFh indicates that the fan is not spinning, or the tachometer input is not connected to a valid signal
(This could be triggered by a counter overflow).
FFFEh, if the SLOW bit in the corresponding TACHx Option register is set (see
"Registers 90h-93h: TachX Option Registers," on page 72
but too slowly to be measured at the current TACH settings.
These registers are read only – a write to these registers has no effect.
Registers 30-32h: Current PWM Duty
R
(See
R
(See
R
(See
Note 8.8
The Current PWM Duty registers store the duty cycle that the chip is currently driving the PWM signals
at. At initial power-on, the duty cycle is 100% and thus, when read, this register will return FFh. After
the Ready/Lock/Start Register Start bit is set, this register and the PWM signals are updated based
/W
/W
/W
8.8)
8.8)
8.8)
PWM1 Current Duty Cycle
PWM2 Current Duty Cycle
PWM3 Current Duty Cycle
These registers are only writable when the associated fan is in manual mode. These
registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
Register Name
for a description of this monitoring mode).
Table 8.7 Registers 30-32h: Current PWM Duty
μ
s). This gives the measured period of two full TACH pulses which equals
DATASHEET
(MSb)
Bit 7
Section 7.1.4.4, "Mode 2 – Monitor Tach input When PWM is
7
7
7
Table 7.2 on page 42
51
Bit 6
6
6
6
Bit 5
μ
5
5
5
s (clock period) yields 0.03562s. This number
Bit 4
for details), indicates that fan is spinning,
4
4
4
and
Bit 3
3
3
3
Table 7.3 on page 43
Bit 2
2
2
2
Bit 1
Revision 0.32 (06-23-08)
1
1
1
Section 8.2.27,
(LSb)
Bit 0
0
0
0
for minimum
Default
Value
N/A
N/A
N/A

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