LAN9210-ABZJ SMSC, LAN9210-ABZJ Datasheet - Page 9

IC ETHERNET CTLR SGL CHIP 56-QFN

LAN9210-ABZJ

Manufacturer Part Number
LAN9210-ABZJ
Description
IC ETHERNET CTLR SGL CHIP 56-QFN
Manufacturer
SMSC
Datasheet

Specifications of LAN9210-ABZJ

Controller Type
Ethernet Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1048-6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9210-ABZJ
Manufacturer:
Standard
Quantity:
2 500
Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
Chapter 1 General Description
SMSC LAN9210
The LAN9210 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded
applications where performance, flexibility, ease of integration and system cost control are required.
The LAN9210 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP
Auto-MDIX.
The LAN9210 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like
slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to
most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a
16-bit external bus. The integrated checksum offload engines enable the automatic generation of the
16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The
LAN9210 also includes large transmit and receive data FIFOs to accommodate high latency
applications. In addition, the LAN9210 memory buffer architecture allows highly efficient use of memory
resources by optimizing packet granularity.
Applications
The LAN9210 is well suited for many medium-performance embedded applications, including:
The LAN9210 also supports features which reduce or eliminate packet loss. Its internal 16-KByte
SRAM can hold over 200 received packets. If the receive FIFO gets too full, the LAN9210 can
automatically generate flow control packets to the remote node, or assert back-pressure on the remote
node by generating network collisions.
The LAN9210 supports numerous power management and wakeup features. The LAN9210 can be
placed in a reduced power mode and can be programmed to issue an external wake signal via several
methods, including “Magic Packet”, “Wake on LAN” and “Link Status Change”. This signal is ideal for
triggering system power-up using remote Ethernet wakeup events. The device can be removed from
the low power state via a host processor command.
Printers, kiosks, POS terminals and security systems
Audio distribution systems
General embedded systems
Basic cable, satellite and IP set-top boxes
Voice-over-IP solutions
DATASHEET
9
Revision 2.7 (03-15-10)

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