UJA1075TW/5V0/WD,1 NXP Semiconductors, UJA1075TW/5V0/WD,1 Datasheet - Page 37

• Manufacturer Part Number: UJA1075TW/5V0/WD,1
• Description: IC SBC CAN/LIN HS 5V 32HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1075TW/5V0/WD,1

• Controller Type: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 4.5 V ~ 28 V
• Current - Supply: 83µA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 10.
T
are defined with respect to ground; positive currents flow in the IC; typical values are given at V
specified.
UJA1075_2
Product data sheet
Symbol
I
Limp home output; pin LIMP
I
Wake bias output; pin WBIAS
I
CAN transmit data input; pin TXDC
V
V
R
CAN receive data output; pin RXDC
I
I
R
High-speed CAN bus lines; pins CANH and CANL
V
V
V
V
I
I
pd
O
O
OH
OL
O(dom)
O(rec)
vj
th(sw)
hys(i)
O(dom)
dom(TX)sym
O(dif)bus
O(rec)
pu
pu
=
−
40 °C to +150
Static characteristics
Parameter
pull-down current
output current
output current
switching threshold voltage
input hysteresis voltage
pull-up resistance
HIGH-level output current
LOW-level output current
pull-up resistance
dominant output voltage
transmitter dominant voltage
symmetry
bus differential output
voltage
recessive output voltage
dominant output current
recessive output current
°
C; V
BAT
= 4.5 V to 28 V; V
…continued
All information provided in this document is subject to legal disclaimers.
Conditions
V
V
T
V
V
V
CAN Active mode
V
V
MC = 00; Standby mode
CAN Active mode
V
R
V
R
CAN Active mode (dominant)
V
R
CAN Active mode (recessive)
V
R
CAN Active mode; V
V
R
CAN Lowpower/Off mode
R
CAN Active mode
V
V
V
vj
BAT
WAKE
LIMP
WBIAS
V1
V1
RXDC
RXDC
V2
dom(TX)sym
V2
V2
TXDC
TXDC
CANL
TXDC
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
(CANH-CANL)
pin CANH
pin CANL
pin CANH; V
pin CANL; V
= −40 °C to 200 °C
= 2.97 V to 5.5 V
= 2.97 V to 5.5 V
= 4.5 V to 5.5 V; V
= 4.75 V to 5.25 V; V
= 4.5 V to 5.5 V; V
> V
Rev. 02 — 27 May 2010
= 0.4 V; LHC = 1
= V
= V
= 0 V; V
= V
= V
= 0.4 V
= V
= 1.4 V
V1
CANH
V1
V1
V1
BAT
; V
= V
; V
− 0.4 V
= 60 Ω
= 60 Ω
= 45 Ω to 65 Ω
= no load
= no load
= no load
BAT
for t < t
V2
CANL
CANH
V2
V2
= −27 V to +32 V
> V
= 5 V
− V
= 4.5 V to 5.5 V
= 40 V
= 0 V
V2
V2
CANH
wake
TXDC
TXDC
; R
= 4.5 V to 5.5 V
TXDC
LIN
High-speed CAN/LIN core system basis chip
− V
= 0 V
= V
= 500
CANL
= 0 V
V1
Ω
; R
(CANH-CANL)
Min
0
0.8
1
0.3V
100
4
−20
4
0.5
−400
1.5
−50
2
−0.1
−100
40
−3
1.6
2.75
BAT
V1
= 45
= 14 V; unless otherwise
Typ
-
-
-
-
-
12
-
-
12
3.5
1.5
-
-
0
0.5V
-
−70
70
-
Ω
UJA1075
© NXP B.V. 2010. All rights reserved.
to 65
V2
25
25
2.25
Max
2
8
7
0.7V
900
−1.5
20
4.5
400
3.0
+50
3
+0.1
−40
100
3
Ω
; all voltages
V1
37 of 53
kΩ
kΩ
Unit
μA
mA
mA
V
mV
mA
mA
V
V
mV
V
mV
V
V
mA
mA
mA