UJA1075TW/5V0/WD,1 NXP Semiconductors, UJA1075TW/5V0/WD,1 Datasheet - Page 38

• Manufacturer Part Number: UJA1075TW/5V0/WD,1
• Description: IC SBC CAN/LIN HS 5V 32HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1075TW/5V0/WD,1

• Controller Type: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 4.5 V ~ 28 V
• Current - Supply: 83µA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 10.
T
are defined with respect to ground; positive currents flow in the IC; typical values are given at V
specified.
UJA1075_2
Product data sheet
Symbol
V
V
R
ΔR
R
C
C
I
CAN bus common mode stabilization output; pin SPLIT
V
I
LIN transmit data input; pin TXDL
V
V
R
LIN receive data output; pin RXDL
I
I
R
LIN bus line; pin LIN
I
LI
L
OH
OL
BUS_LIM
vj
th(RX)dif
hys(RX)dif
O
th(sw)
hys(i)
i(cm)
i(dif)
i(cm)
i(dif)
pu
pu
=
i
−
40 °C to +150
Static characteristics
Parameter
differential receiver
threshold voltage
differential receiver
hysteresis voltage
common-mode input
resistance
input resistance deviation
differential input resistance
common-mode input
capacitance
differential input capacitance CAN Active mode; not tested
input leakage current
output voltage
leakage current
switching threshold voltage
input hysteresis voltage
pull-up resistance
HIGH-level output current
LOW-level output current
pull-up resistance
current limitation for driver
dominant state
°
C; V
BAT
= 4.5 V to 28 V; V
…continued
All information provided in this document is subject to legal disclaimers.
Conditions
CAN Active mode
V
−30 V < V
−30 V < V
CAN Lowpower mode
−12 V < V
−12 V < V
CAN Active mode
V
−30 V < V
−30 V < V
CAN Active mode; V
V
CAN Active mode; V
V
CAN Active mode; V
V
CAN Active mode; not tested
V
V
V
I
CAN Active mode
V
CAN Lowpower/Off mode or Active
mode with V
V
V
V
LIN Active mode
V
V
MC = 00; Standby mode
LIN Active mode
V
V
CAN Active mode
SPLIT
BAT
V2
V2
CANH
CANH
CANH
BAT
CANH
V2
V2
SPLIT
V1
V1
RXDL
RXDL
BAT
TXDL
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V; R
= 2.97 V to 5.5 V
= 2.97 V to 5.5 V
= 0 V; V
> V
= V
Rev. 02 — 27 May 2010
= −500 μA to 500 μA
= 0.4 V
= 0 V
= V
= −30 V to + 30 V
= V
= V
= V
= V
V1
LIN
CANH
CANL
CANH
CANL
CANH
CANL
V1
CANL
CANL
CANL
CANL
; V
= 18 V
V2
− 0.4 V
V2
BAT
< +30 V
< +12 V
< +30 V
< 4.5 V
< +30 V
< +12 V
< +30 V
= 5 V
= 5 V
= −35 V to +35 V
= 5 V
= 0 V
> V
V2
V2
V2
V2
; R
L
= 5 V
= 5 V
= 5.5 V
≥ 1 MΩ
LIN
High-speed CAN/LIN core system basis chip
= 500
Ω
; R
(CANH-CANL)
Min
0.5
0.4
40
9
−1
19
-
-
−5
0.3V
0.45 ×
V
−5
0.3V
100
4
−20
1.6
4
40
V2
BAT
V2
V1
= 45
= 14 V; unless otherwise
Typ
0.7
0.7
120
15
-
30
-
-
-
0.5V
0.5 ×
V
-
-
-
12
-
-
12
-
V2
Ω
UJA1075
© NXP B.V. 2010. All rights reserved.
to 65
V2
20
10
25
20
25
Max
0.9
1.15
400
28
+1
52
+5
0.7V
0.55 ×
V
+5
0.7V
900
−1.5
100
Ω
V2
; all voltages
V2
V1
38 of 53
pF
kΩ
kΩ
Unit
V
V
mV
kΩ
%
kΩ
pF
μA
V
V
μA
V
mV
mA
mA
mA