TDA8026ET/C2,557 NXP Semiconductors, TDA8026ET/C2,557 Datasheet - Page 44
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TDA8026ET/C2,557
Manufacturer Part Number
TDA8026ET/C2,557
Description
IC SMART CARD SLOT 64TFBGA
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8026ETC2518.pdf
(59 pages)
Specifications of TDA8026ET/C2,557
Controller Type
Smart Card Interface
Interface
I²C
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
210mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TDA8026ET/C2,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 45.
V
T
[1]
[2]
[3]
[4]
[5]
Table 46.
V
T
[1]
Table 47.
V
T
TDA8026_1
Product data sheet
Symbol
Card presence input: pin PRES; active HIGH when SPRES pin = LOW or active LOW when SPRES pin = HIGH
V
V
I
I
t
Symbol
t
t
T
Symbol Parameter
Data line pins: I/OUC1 and I/OUC2
V
V
V
V
I
V
I
LIL
LIH
deb
act
deact
IL
LIH
amb
amb
amb
DD
DD
DD
clk
IL
IH
OL
OH
IL
IH
hys
= V
Two ceramic multilayer capacitors of minimum 100 nF with low Equivalent Series Resistance (ESR) should be used in order to meet
these specifications.
Output voltage towards the card, including ripple.
I/O
I/OUCn pin has an internal 11 k pull-up resistor to V
Maximum value measurement based on a 125 mA (sum of all card supply currents on pins V
converter and inductance efficiency; depends on PCB layout and external component quality (inductor, capacitor).
= V
Refer to
= V
= 25 C unless otherwise specified.
= 25 C unless otherwise specified.
= 25 C unless otherwise specified.
(n)
DD(INTF)
DD(INTF)
DD(INTF)
pin has an internal 10 k pull-up resistor to V
LOW-level output
voltage
HIGH-level output
voltage
LOW-level input
voltage
HIGH-level input
voltage
LOW-level input
current
hysteresis voltage
HIGH-level input
leakage current
Parameter
activation time
deactivation time
clock period
Card drivers
Sequencer and clock counter
Interface signals to microcontroller
Section 8.8.3
Parameter
LOW-level input voltage
HIGH-level input voltage
LOW-level input leakage
current
HIGH-level input
leakage current
debounce time
= 3.3 V; f
= 3.3 V; f
= 3.3 V; f
for further information.
clk(ext)
clk(ext)
clk(ext)
…continued
= 10 MHz; GND = 0 V; inductor = 10 H; decoupling capacitors on pins V
= 10 MHz; GND = 0 V; inductor = 10 H; decoupling capacitors on pins V
= 10 MHz; GND = 0 V; inductor = 10 H; decoupling capacitors on pins V
Conditions
I
no DC load
V
on I/OUC
V
OL
10 A
IL
IH
[1]
= 1 mA
= 0 V
= V
Conditions
V
V
i
i
DD(INTF)
= 0.2V
= 0.8V
All information provided in this document is subject to legal disclaimers.
(n)
I
Conditions
total sequence
total sequence
sequencer
OH
DD(INTF)
DD(INTF)
0
CC(n)
Rev. 1 — 9 March 2010
DD(INTF).
.
Min
0
0.9 V
0.75 V
0.7 V
-
-
-
0.3
DD(INTF)
DD(INTF)
DD(INTF)
Min
0.8 V
-
-
-
0.3
Multiple smart card slot interface IC
DD(INTF)
Typ
-
-
-
-
-
-
0.19V
-
CC(n)
) current load and a 75 % DC-to-DC
[1]
[1]
DD(INTF)
Typ
-
-
-
-
17.8
Min
-
60
-
Max
0.3
V
V
+0.25 V
V
600
-
10
Max
+0.2 V
V
70
5
23.8
Typ
-
80
25
DD(INTF)
DD(INTF)
DD(INTF)
TDA8026
DD
DD
DD
© NXP B.V. 2010. All rights reserved.
DD(INTF)
and V
and V
and V
DD(INTF)
DD(INTF)
Max
135
100
-
+ 0.2
+ 0.2
+ 0.3
+ 0.3 V
UP
UP
UP
= 10 F;
= 10 F;
= 10 F;
44 of 59
Unit
Unit
V
ms
s
s
s
Unit
V
V
V
V
V
V
A
A
A
A