DP83916VF National Semiconductor, DP83916VF Datasheet - Page 47

• Manufacturer Part Number: DP83916VF
• Description: IC CTRLR ORIENT NETWK IN 132PQFP
• Manufacturer: National Semiconductor
• Series: SONIC™r

Specifications of DP83916VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Bus
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Operating Temperature: -
• Other names: *DP83916VF

NETWORK INTERFACE PINS (Continued)
BUS INTERFACE PINS
LBK
EXUSR2
PCOMP
SEL
PREJ
X1
X2
BMODE
D31–D0
5 0 Bus Interface
Symbol
Driver
Type
TRI
TRI
TRI
TP
TP
Direction
(Continued)
I O Z
O Z
O Z
I O
I O
O
I
I
I
This pin will be TRI-STATE until the DCR has been written to (See Section 4 3 2
EXBUS for more information )
Loopback (LBK) When ENDEC loopback is programmed this pin is asserted high
Although this signal is used internally by the SONIC-16 it is also provided as an output to
the user
Extended User Output (EXUSR2) When EXBUS has been set (see Section 4 3 2) this
pin becomes a programmable output It will remain TRI-STATE until the SONIC-16
becomes a bus master at which time it will be driven according to the value
programmed in the DCR2 (Section 4 3 7)
Packet Compression This pin is used with the Management Bus of the DP83950
Repeater Interface Controller (RIC) The SONIC-16 can be programmed to assert
PCOMP whenever there is a CAM match or when there is not a match The RIC uses
this signal to compress (shorten) a received packet for management purposes and to
reduce memory usage (See the DP83950 datasheet for more details on the RIC
Management Bus ) The operation of this pin is controlled by bits 1 and 2 in the DCR2
register PCOMP will remain TRI-STATE until these bits are written to
Mode Select (EXT
TX
interface When tied to V
to ground the voltage at TX
side of the isolation transformer ( Figure 6-2 )
Packet Reject This signal is used to reject received packets When asserted low for at
least two receive clocks (RXC) the SONIC-16 will reject the incoming packet This pin
can be asserted up to the 2nd to the last bit of reception to reject a packet
Crystal or External Oscillator Input This signal is used to provide clocking signals for
the internal ENDEC A crystal can be connected to this pin along with X2 or an
oscillator module may be used Typically the output of an oscillator module is connected
to this pin See Section 6 1 3 for more information about using oscillators or crystals
Crystal Feedback Output This signal is used to provide clocking signals for the
internal ENDEC A crystal may be connected to this pin along with X1 or an oscillator
module may be used See Section 6 1 3 for more information about using oscillator
modules or crystals
Bus Mode This input enables the SONIC-16 to be compatible with standard
microprocessor buses The level of this pin affects byte ordering (little or big endian) and
controls the operation of the bus interface control signals A high level (tied to V
selects Motorola mode (big endian) and a low level (tied to ground) selects National
Intel mode (little endian) Note the alternate pin definitions for AS ADS MRW MWR
INT INT BR HOLD BG HLDA SRW SWR DSACK0 RDYi and DSACK1 RDYo
When BMODE
definition is used See Sections 5 4 1 5 4 4 and 5 4 5
Data Bus These bidirectional lines are used to transfer data on the system bus When
the SONIC-16 is a bus master 16-bit data is transferred on D15– D0 and 32-bit data is
transferred on D31– D0 When the SONIC-16 is accessed as a slave register data is
driven onto lines D15– D0
TABLE 5-1 Pin Description (Continued)
a
and TX
b
e
during idle at the primary of the isolation transformer on the network
1 the first pin definition is used and when BMODE
e
47
0) This pin is used to determine the voltage relationship between
CC
a
TX
is positive with respect to TX
a
and TX
Description
b
are at equal voltages during idle When tied
b
during idle on the primary
e
0 the second pin
CC
)