DP83916VF National Semiconductor, DP83916VF Datasheet - Page 6

• Manufacturer Part Number: DP83916VF
• Description: IC CTRLR ORIENT NETWK IN 132PQFP
• Manufacturer: National Semiconductor
• Series: SONIC™r

Specifications of DP83916VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Bus
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Operating Temperature: -
• Other names: *DP83916VF

1 0 Functional Description
During transmission of a packet from the SONIC-16 the
external transceiver will always loop the packet back to the
SONIC-16 The SONIC-16 will use this to monitor the packet
as it is being transmitted The CRC and source address of
the looped back packet are checked with the CRC and
source address that were transmitted If they do not match
an error bit is set in the status of the transmitted packet (see
Packet Monitored Bad PBM in the Transmit Control Regis-
ter section 4 3 4) Data is not written to the receive FIFO
during this monitoring process unless Transceiver Loopback
mode has been selected (see section 1 7)
Receive Logic The receive logic contains the command
control and status registers that govern the operations of
the receive section It generates the control signals for writ-
ing data to the receive FIFO processes error signals ob-
tained from the CRC checker and the deserializer activates
the ‘‘packet reject’’ signal to the RSM for rejecting packets
and posts the applicable status in the Receive Control regis-
ter
Deserializer This section deserializes the serial input data
stream and furnishes a byte clock for the address compara-
tor and receive logic It also synchronizes the CRC checker
to begin operation (after SFD is detected) and checks for
proper frame alignment with respect to CRS going inactive
at the end of reception
Address Comparator The address comparator latches the
Destination Address (during reception or loopback) or
Source Address (during transmission) and determines
whether the address matches one of the entries in the CAM
(Content Addressable Memory)
CRC Checker The CRC checker calculates the 4-byte
Frame Check Sequence (FCS) field from the incoming data
stream and compares it with the last 4-bytes of the received
packet The CRC checker is active for both normal recep-
tion and self-reception during transmission
Content Addressable Memory (CAM) The CAM contains
16 user programmable entries and 1 pre-programmed
Broadcast address entry for complete filtering of received
packets The CAM can be loaded with any combination of
Physical and Multicast Addresses (section 2 2) See section
4 1 for the procedure on loading the CAM registers
1 2 2 MAC Transmit Section
The transmit section (Figure 1-4 ) is responsible for reading
data from the transmit FIFO and transmitting a serial data
(Continued)
FIGURE 1-4 MAC Transmitter
6
rithm before reattempting another transmission In this algo-
stream onto the network in conformance with the IEEE
802 3 CSMA CD standard The Transmit Section consists
of the following blocks
Transmit State Machine (TSM) The TSM controls the
functions of the serializer preamble generator and JAM
generator It determines the proper sequence of events that
the transmitter follows under various network conditions If
no collision occurs the transmitter prefixes a 62-bit pream-
ble and 2-bit Start of Frame Delimiter (SFD) at the beginning
of each packet then sends the serialized data At the end of
the packet an optional 4-byte CRC pattern is appended If a
collision occurs the transmitter switches from transmitting
data to sending a 4-byte Jam pattern to notify all nodes that
a collision has occurred Should the collision occur during
the preamble the transmitter waits for it to complete before
jamming After the transmission has completed the trans-
mitter writes status in the Transmit Control register (section
4 3 4)
Protocol State Machine The protocol state machine as-
sures that the SONIC-16 obeys the CSMA CD protocol Be-
fore transmitting this state machine monitors the carrier
sense and collision signals for network activity If another
node(s) is currently transmitting the SONIC-16 defers until
the network is quiet then transmits after its Interframe Gap
Timer (9 6 s) has expired The Interframe Gap time is divid-
ed into two portions During the first 6 4 s network activity
restarts the Interframe Gap timer Beyond this time howev-
er network activity is ignored and the state machine waits
the remaining 3 2
experiences a collision during a transmission the SONIC-16
switches from transmitting data to a 4-byte JAM pattern (4
bytes of all 1’s) before ceasing to transmit The SONIC-16
then waits a random number of slot times (51 2
mined by the Truncated Binary Exponential Backoff Algo-
rithm the number of slot times to delay before the nth re-
transmission is chosen to be a random integer r in the range
of
If a collision occurs on the 16th transmit attempt the SON-
IC-16 aborts transmitting the packet and reports an ‘‘Exces-
sive Collisions’’ error in the Transmit Control register
where k
s before transmitting If the SONIC-16
0
s
e
r
s
min(n 10)
2
k
TL F 11722 – 5
s) deter-