CY7C9689A-AXC Cypress Semiconductor Corp, CY7C9689A-AXC Datasheet - Page 28

• Manufacturer Part Number: CY7C9689A-AXC
• Description: IC TXRX HOTLINK 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr
• Type: Transceiverr

Specifications of CY7C9689A-AXC

• Package / Case: 100-LQFP
• Voltage - Supply: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Product: PHY
• Interface Type: Parallel
• Supply Voltage (max): 6.5 V
• Supply Voltage (min): 2 V
• Supply Current: 250 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Msl: MSL 3 - 168 Hours
• No. Of Receivers: 2
• Rohs Compliant: Yes
• Frequency Max: 50MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Document #: 38-02020 Rev. *E
CY7C9689A HOTLink Transmitter Switching Waveforms
Notes
EXTFIFO = LOW
FIFOBYP = HIGH
TXDATA[7:0]
Asynchronous (FIFO) Interface
Write Cycle
TXDATA[9:8]/TXCMD[2:3]
EXTFIFO = HIGH
FIFOBYP = HIGH
Asynchronous (FIFO) Interface
32. Illustrates timing only. TXEN and TXRST not usually active in same time period.
33. When transferring data to the Transmitter input from a depth expanded external FIFO, the data is captured from the external FIFO one clock cycle following the
TXSC/D
OUTPUT ENABLE Timing
TXHALT
TXCMD[1:0]
TXDATA[7:0]
TXEMPTY
TXDATA[9:8]/TXCMD[2:3]
TXSC/D
TXCMD[1:0]
TXEMPTY
TXHALF
TXHALT
TXFULL
actual enable (TXEN = HIGH).
TXCLK
TXHALF
TXEN
TXFULL
TXRST
TXCLK
TXEN
CE
t
TXCES
t
TXA
t
TXDS
t
TXENS
Note 33
t
TXRSS
Note 32
(continued)
t
t
TXDH
TXENH
t
t
t
TXOZA
TXRSH
TXCEH
t
t
TXA
TXOE
NO OPERATION
NO OPERATION
t
TXOAZ
CY7C9689A
Page 28 of 51
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