IDT82V2084PFG8 IDT, Integrated Device Technology Inc, IDT82V2084PFG8 Datasheet - Page 38

IC LINE INTERFC UNIT 4CH 128TQFP

IDT82V2084PFG8

Manufacturer Part Number
IDT82V2084PFG8
Description
IC LINE INTERFC UNIT 4CH 128TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of IDT82V2084PFG8

Protocol
E1
Voltage - Supply
3.13 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
800-1864-2
82V2084PFG8

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT82V2084PFG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
QUAD CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
4.2.3
Table-31 TCF0: Transmitter Configuration Register 0
Table-32 TCF1: Transmitter Configuration Register 1
mode, for E1/75 Ω cable impedance, the PULS[3:0] bits should be set to ‘0001’.
1. In internal impedance matching mode, for E1/75 Ω cable impedance, the PULS[3:0] bits (TCF1, 03H...) should be set to ‘0000’. In external impedance matching
TCLK_SEL
DFM_OFF
T_MD[1:0]
PULS[3:0]
Symbol
Symbol
TD_INV
T_OFF
THZ
TRANSMIT PATH CONTROL REGISTERS
-
-
(R/W, Address = 02H,42H,82H,C2H)
(R/W, Address = 03H,43H,83H,C3H)
7-6
3-0
7-5
1-0
Bit
Bit
5
4
4
3
2
Default
Default
0000
000
00
00
0
0
0
0
1
Transmit data invert
Transmit clock edge select
Transmit driver failure monitor disable
These bits select the transmit template/LBO for short-haul/long-haul applications.
Reserved
Transmitter power down enable
= 0: Transmitter power up
= 1: Transmitter power down and line driver high impedance
= 0: data on TDn or TDPn/TDNn is active high
= 1: data on TDn or TDPn/TDNn is active low
= 0: data on TDn or TDPn/TDNn is sampled on the falling edges of TCLKn
= 1: data on TDn or TDPn/TDNn is sampled on the rising edges of TCLKn
Transmitter operation mode control bits which select different stages of transmit data path
= 00: enable HDB3/B8ZS encoder and waveform shaper blocks, input on TDn is single rail NRZ data
= 01: enable AMI encoder and waveform shaper blocks, input on pin TDn is single rail NRZ data
= 1x: encoder is bypassed, dual rail NRZ transmit data input on pin TDPn/TDNn
Reserved. This bit should be ‘0’ for normal operation.
= 0: DFM is enabled
= 1: DFM is disabled
Transmit line driver high impedance enable
= 0: normal state
= 1: transmit line driver high impedance enable (other transmit path still in normal state)
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
11xx
1
User programmable waveform setting
T1/E1/J1
DSX1
DSX1
DSX1
DSX1
DSX1
DS1
DS1
DS1
DS1
E1
E1
J1
38
2.048 MHz
2.048 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
1.544 MHz
TCLK
Description
Description
Impedance
120 Ω
100 Ω
100 Ω
100 Ω
100 Ω
100 Ω
110 Ω
100 Ω
100 Ω
100 Ω
100 Ω
Cable
75 Ω
-22.5 dB LBO
Cable Range
-7.5 dB LBO
-15 dB LBO
133~266 ft
266~399 ft
399~533 ft
533~655 ft
0 dB LBO
TEMPERATURE RANGES
0~133 ft
0~655 ft
or LBO
-
-
0~43 dB (default)
INDUSTRIAL
Cable Loss
0.6~1.2 dB
1.2~1.8 dB
1.8~2.4 dB
2.4~3.0 dB
0~28.5 dB
0~13.5 dB
0~0.6 dB
0~3.0 dB
0~43 dB
0~36 dB
0~21 dB

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