PIC18F2455-I/SP Microchip Technology Inc., PIC18F2455-I/SP Datasheet - Page 309

• Manufacturer Part Number: PIC18F2455-I/SP
• Description: Microcontroller; 24 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2455-I/SP

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 23
• Interface: I2C/SPI/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 24K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

INDEX
A
A/D ................................................................................... 173
Absolute Maximum Ratings ............................................. 265
AC (Timing) Characteristics ............................................. 281
AC Characteristics
ADCON0 Register ............................................................ 173
ADCON1 Register ............................................................ 173
ADCON2 Register ............................................................ 173
ADDFSR .......................................................................... 254
ADDLW ............................................................................ 217
ADDULNK ........................................................................ 254
ADDWF ............................................................................ 217
ADDWFC ......................................................................... 218
ADRESH Register ............................................................ 173
ADRESL Register .................................................... 173, 176
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 218
ANDWF ............................................................................ 219
Assembler
Auto-Wake-up on Sync Break Character ......................... 166
B
BC .................................................................................... 219
BCF .................................................................................. 220
Block Diagrams
© 2006 Microchip Technology Inc.
Acquisition Requirements ........................................ 178
ADCON0 Register .................................................... 173
ADCON1 Register .................................................... 173
ADCON2 Register .................................................... 173
ADRESH Register ............................................ 173, 176
ADRESL Register .................................................... 173
Analog Port Pins, Configuring .................................. 180
Associated Registers ............................................... 182
Configuring the Module ............................................ 177
Conversion Clock (T
Conversion Requirements ....................................... 292
Conversion Status (GO/DONE Bit) .......................... 176
Conversions ............................................................. 181
Converter Characteristics ........................................ 291
Converter Interrupt, Configuring .............................. 177
Discharge ................................................................. 181
Operation in Power-Managed Modes ...................... 180
Selecting and Configuring Acquisition Time ............ 179
Special Event Trigger (CCP1) .................................. 182
Use of the CCP1 Trigger .......................................... 182
Load Conditions for Device
Parameter Symbology ............................................. 281
Temperature and Voltage Specifications ................. 282
Timing Conditions .................................................... 282
Internal RC Accuracy ............................................... 284
GO/DONE Bit ........................................................... 176
MPASM Assembler .................................................. 262
A/D ........................................................................... 176
Analog Input Model .................................................. 177
Capture Mode Operation ......................................... 124
Compare Mode Operation ....................................... 125
Device Clock .............................................................. 24
EUSART Receive .................................................... 164
EUSART Transmit ................................................... 162
External Power-on Reset Circuit
Timing Specifications ....................................... 282
(Slow V
DD
Power-up) ......................................... 43
AD
) ........................................... 179
Advance Information
BN .................................................................................... 220
BNC ................................................................................. 221
BNN ................................................................................. 221
BNOV .............................................................................. 222
BNZ ................................................................................. 222
BOR. See Brown-out Reset.
BOV ................................................................................. 225
BRA ................................................................................. 223
Brown-out Reset (BOR) ..................................................... 44
BSF .................................................................................. 223
BTFSC ............................................................................. 224
BTFSS ............................................................................. 224
BTG ................................................................................. 225
BZ .................................................................................... 226
C
C Compilers
CALL ................................................................................ 226
CALLW ............................................................................ 255
Capture (CCP Module) .................................................... 124
Capture/Compare/PWM (CCP) ....................................... 123
Clock Sources .................................................................... 30
CLRF ............................................................................... 227
CLRWDT ......................................................................... 227
Fail-Safe Clock Monitor ........................................... 204
Generic I/O Port ......................................................... 99
High/Low-Voltage Detect with External Input .......... 184
Interrupt Logic ............................................................ 86
On-Chip Reset Circuit ................................................ 41
PIC18F2450 .............................................................. 10
PIC18F4450 .............................................................. 11
PLL (HS Mode) .......................................................... 26
PWM Operation (Simplified) .................................... 127
Reads from Flash Program Memory ......................... 77
Table Read Operation ............................................... 73
Table Write Operation ............................................... 74
Table Writes to Flash Program Memory .................... 79
Timer0 in 16-Bit Mode ............................................. 112
Timer0 in 8-Bit Mode ............................................... 112
Timer1 ..................................................................... 116
Timer1 (16-Bit Read/Write Mode) ............................ 116
Timer2 ..................................................................... 122
USB Interrupt Logic Funnel ..................................... 143
USB Peripheral and Options ................................... 129
Watchdog Timer ...................................................... 201
Detecting ................................................................... 44
Disabling in Sleep Mode ............................................ 44
Software Enabled ...................................................... 44
MPLAB C18 ............................................................. 262
MPLAB C30 ............................................................. 262
Associated Registers ............................................... 126
CCP1 Pin Configuration .......................................... 124
CCPR1H:CCPR1L Registers .................................. 124
Prescaler ................................................................. 124
Software Interrupt .................................................... 124
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 124
CCPR1H Register ................................................... 124
CCPR1L Register .................................................... 124
Compare Mode. See Compare.
Module Configuration .............................................. 124
Selection Using OSCCON Register .......................... 30
PIC18F2450/4450
DS39760A-page 307