PIC18F2455-I/SP Microchip Technology Inc., PIC18F2455-I/SP Datasheet - Page 90

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PIC18F2455-I/SP

Manufacturer Part Number
PIC18F2455-I/SP
Description
Microcontroller; 24 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F2455-I/SP

A/d Inputs
10-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
23
Interface
I2C/SPI/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
24K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2455-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2450/4450
REGISTER 8-2:
DS39760A-page 88
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note:
R/W-1
RBPU
Interrupt flag bits are set when an interrupt condition occurs regardless of the state of its corresponding
enable bit or the global interrupt enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
Unimplemented: Read as ‘0’
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
INTEDG0
R/W-1
INTCON2: INTERRUPT CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
INTEDG1
R/W-1
Advance Information
INTEDG2
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
TMR0IP
R/W-1
© 2006 Microchip Technology Inc.
x = Bit is unknown
U-0
R/W-1
RBIP
bit 0

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