PIC18F2455-I/SP Microchip Technology Inc., PIC18F2455-I/SP Datasheet - Page 314

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PIC18F2455-I/SP

Manufacturer Part Number
PIC18F2455-I/SP
Description
Microcontroller; 24 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F2455-I/SP

A/d Inputs
10-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
23
Interface
I2C/SPI/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
24K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2455-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2450/4450
R
RAM. See Data Memory.
RC_IDLE Mode .................................................................. 39
RC_RUN Mode .................................................................. 35
RCALL .............................................................................. 241
RCON Register
Reader Response ............................................................ 316
Register File Summary ................................................. 63–65
Registers
DS39760A-page 312
Bit Status During Initialization .................................... 48
ADCON0 (A/D Control 0) ......................................... 173
ADCON1 (A/D Control 1) ......................................... 174
ADCON2 (A/D Control 2) ......................................... 175
BAUDCON (Baud Rate Control) .............................. 156
BDnSTAT (Buffer Descriptor n Status,
BDnSTAT (Buffer Descriptor n Status,
CCP1CON (Capture/Compare/PWM
CONFIG1H (Configuration 1 High) .......................... 192
CONFIG1L (Configuration 1 Low) ............................ 191
CONFIG2H (Configuration 2 High) .......................... 194
CONFIG2L (Configuration 2 Low) ............................ 193
CONFIG3H (Configuration 3 High) .......................... 195
CONFIG4L (Configuration 4 Low) ............................ 196
CONFIG5H (Configuration 5 High) .......................... 197
CONFIG5L (Configuration 5 Low) ............................ 197
CONFIG6H (Configuration 6 High) .......................... 198
CONFIG6L (Configuration 6 Low) ............................ 198
CONFIG7H (Configuration 7 High) .......................... 199
CONFIG7L (Configuration 7 Low) ............................ 199
DEVID1 (Device ID 1) .............................................. 200
DEVID2 (Device ID 2) .............................................. 200
EECON1 (Memory Control 1) .................................... 75
HLVDCON (High/Low-Voltage
INTCON (Interrupt Control) ........................................ 87
INTCON2 (Interrupt Control 2) ................................... 88
INTCON3 (Interrupt Control 3) ................................... 89
IPR1 (Peripheral Interrupt Priority 1) .......................... 94
IPR2 (Peripheral Interrupt Priority 2) .......................... 95
OSCCON (Oscillator Control) .................................... 31
PIE1 (Peripheral Interrupt Enable 1) .......................... 92
PIE2 (Peripheral Interrupt Enable 2) .......................... 93
PIR1 (Peripheral Interrupt Request
PIR2 (Peripheral Interrupt Request
PORTE ..................................................................... 109
RCON (Reset Control) ......................................... 42, 96
RCSTA (Receive Status and Control) ...................... 155
STATUS ..................................................................... 66
STKPTR (Stack Pointer) ............................................ 55
T0CON (Timer0 Control) .......................................... 111
T1CON (Timer1 Control) .......................................... 115
T2CON (Timer2 Control) .......................................... 121
TXSTA (Transmit Status and Control) ..................... 154
UCFG (USB Configuration) ...................................... 132
UCON (USB Control) ............................................... 130
UEIE (USB Error Interrupt Enable) .......................... 147
UEIR (USB Error Interrupt Status) ........................... 146
CPU Mode) ...................................................... 139
SIE Mode) ........................................................ 140
Control) ............................................................ 123
Detect Control) ................................................. 183
(Flag) 1) ............................................................. 90
(Flag) 2) ............................................................. 91
Advance Information
RESET ............................................................................. 241
Reset State of Registers .................................................... 48
Reset Timers ..................................................................... 45
Resets ........................................................................ 41, 189
RETFIE ............................................................................ 242
RETLW ............................................................................ 242
RETURN .......................................................................... 243
Return Address Stack ........................................................ 54
Return Stack Pointer (STKPTR) ........................................ 55
Revision History ............................................................... 303
RLCF ............................................................................... 243
RLNCF ............................................................................. 244
RRCF ............................................................................... 244
RRNCF ............................................................................ 245
S
SEC_IDLE Mode ............................................................... 38
SEC_RUN Mode ................................................................ 34
SETF ................................................................................ 245
Single-Supply ICSP Programming ................................... 210
SLEEP ............................................................................. 246
Sleep
Sleep Mode ........................................................................ 37
Software Simulator (MPLAB SIM) ................................... 262
Special Event Trigger. See Compare (CCP Module).
Special Features of the CPU ........................................... 189
Special ICPORT Features ............................................... 209
Stack Full/Underflow Resets .............................................. 56
STATUS Register .............................................................. 66
SUBFSR .......................................................................... 257
SUBFWB ......................................................................... 246
SUBLW ............................................................................ 247
SUBULNK ........................................................................ 257
SUBWF ............................................................................ 247
SUBWFB ......................................................................... 248
SWAPF ............................................................................ 248
T
T0CON Register
Table Pointer Operations (table) ........................................ 76
Table Reads/Table Writes ................................................. 56
TBLRD ............................................................................. 249
TBLWT ............................................................................. 250
Time-out in Various Situations (table) ................................ 45
Time-out Sequence ........................................................... 45
UEPn (USB Endpoint n Control) .............................. 135
UIE (USB Interrupt Enable) ..................................... 145
UIR (USB Interrupt Status) ...................................... 144
USTAT (USB Status) ............................................... 134
WDTCON (Watchdog Timer Control) ...................... 202
Oscillator Start-up Timer (OST) ................................. 45
PLL Lock Time-out ..................................................... 45
Power-up Timer (PWRT) ........................................... 45
Brown-out Reset (BOR) ........................................... 189
Oscillator Start-up Timer (OST) ............................... 189
Power-on Reset (POR) ............................................ 189
Power-up Timer (PWRT) ......................................... 189
and Associated Registers .......................................... 54
OSC1 and OSC2 Pin States ...................................... 32
PSA Bit .................................................................... 113
T0CS Bit .................................................................. 112
T0PS2:T0PS0 Bits ................................................... 113
T0SE Bit .................................................................. 112
© 2006 Microchip Technology Inc.

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