PIC16F628-20I/P Microchip Technology Inc., PIC16F628-20I/P Datasheet - Page 47
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PIC16F628-20I/P
Manufacturer Part Number
PIC16F628-20I/P
Description
18 PIN, 3.5 KB FLASH, 224 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F628-20IP.pdf
(170 pages)
Specifications of PIC16F628-20I/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
16
Interface
SCI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
224 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F628-20I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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6.3.1
The prescaler assignment is fully under software
control (i.e., it can be changed “on the fly” during
program execution). Use the instruction sequences,
shown in Example 6-1, when changing the prescaler
assignment from Timer0 to WDT, to avoid an
unintended device RESET.
EXAMPLE 6-1:
TABLE 6-1:
2003 Microchip Technology Inc.
01h
0Bh/8Bh/
10Bh/18Bh
81h, 181h
85h
Legend:
Note 1: Shaded bits are not used by TMR0 module.
Address
BCF
CLRWDT
CLRF
BSF
MOVLW
MOVWF
CLRWDT
MOVLW
MOVWF
BCF
2: Option is referred by OPTION_REG in MPLAB.
— = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown
SWITCHING PRESCALER
ASSIGNMENT
TMR0
INTCON
OPTION
TRISA
STATUS, RP0
TMR0
STATUS, RP0
'00101111’b
OPTION_REG
'00101xxx’b
OPTION_REG
STATUS, RP0
Name
REGISTERS ASSOCIATED WITH TIMER0
(2)
CHANGING PRESCALER
(TIMER0→WDT)
Timer0 module register
TRISA7
RBPU
Bit 7
GIE
;Skip if already in
;Bank 0
;Clear WDT
;Clear TMR0 & Prescaler
;Bank 1
;These 3 lines
;(5, 6, 7)
;are required only
;if desired PS<2:0>
;are
;000 or 001
;Set Postscaler to
;desired WDT rate
;Return to Bank 0
INTEDG
TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 1111 1111 1111 1111
Bit 6
PEIE
T0CS
Bit 5
T0IE
Preliminary
T0SE
Bit 4
INTE
Bit 3
RBIE
PSA
To change prescaler from the WDT to the TMR0
module use the sequence shown in Example 6-2. This
precaution must be taken even if the WDT is disabled.
EXAMPLE 6-2:
CLRWDT
BSF
MOVLW
MOVWF
BCF
Bit 2
T0IF
PS2
STATUS, RP0
b'xxxx0xxx' ;Select TMR0, new
OPTION_REG
STATUS, RP0
Bit 1
INTF
PS1
CHANGING PRESCALER
(WDT→TIMER0)
Bit 0
RBIF
PS0
PIC16F62X
;Clear WDT and
;prescaler
;prescale value and
;clock source
xxxx xxxx uuuu uuuu
0000 000x 0000 000u
1111 1111 1111 1111
Value on
POR
DS40300C-page 45
All Other
Value on
RESETS
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