PIC16F628-20I/P Microchip Technology Inc., PIC16F628-20I/P Datasheet - Page 97
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PIC16F628-20I/P
Manufacturer Part Number
PIC16F628-20I/P
Description
18 PIN, 3.5 KB FLASH, 224 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F628-20IP.pdf
(170 pages)
Specifications of PIC16F628-20I/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
16
Interface
SCI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
224 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F628-20I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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14.2.6
The internal RC oscillator provides a fixed 4 MHz
(nominal) system clock at V
“Electrical Specifications” section for information on
variation over voltage and temperature.
14.2.7
The PIC16F62X can be configured to provide a clock
out signal by programming the configuration word. The
oscillator frequency, divided by 4 can be used for test
purposes or to synchronize other logic.
14.3
A software programmable Dual Speed Oscillator mode
is provided when the PIC16F62X is configured in either
ER or INTRC Oscillator modes. This feature allows
users to dynamically toggle the oscillator speed
between 4 MHz and 37 kHz. In ER mode, the 4 MHz
setting will vary depending on the value of the external
resistor. Also in ER mode, the 37 kHz operation is fixed
and does not vary with resistor value. Applications that
require low current power savings, but cannot tolerate
putting the part into SLEEP, may use this mode.
The OSCF bit in the PCON register is used to control
Dual Speed mode. See Section 3.2.2.6, Register 3-4.
FIGURE 14-6:
2003 Microchip Technology Inc.
Note
V
MCLR/
OSC1/
CLKIN
PP
V
Pin
DD
Pin
1:
Special Feature: Dual Speed
Oscillator Modes
On-chip
INTERNAL 4 MH
CLKOUT
This is a separate oscillator from the INTRC/ER oscillator.
OSC
OST/PWRT
Detect Reset
Brown-out
V
(1)
Module
detect
WDT
DD
Schmitt Trigger Input
rise
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
OST
PWRT
Timeout
Reset
Power-on Reset
WDT
10-bit Ripple-counter
10-bit Ripple-counter
DD
BODEN
External
RESET
Z
SLEEP
OSCILLATOR
= 5V and 25°C, see
Preliminary
Enable PWRT
Enable OST
14.4
The PIC16F62X differentiates between various kinds of
RESET:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any RESET condi-
tion; their status is unknown on POR and unchanged in
any other RESET. Most other registers are reset to a
“RESET state” on Power-on Reset, MCLR Reset, WDT
Reset and MCLR Reset during SLEEP. They are not
affected by a WDT Wake-up, since this is viewed as the
resumption of normal operation. TO and PD bits are set
or cleared differently in different RESET situations as
indicated in Table 14-5. These bits are used in software
to determine the nature of the RESET. See Table 14-8
for a full description of RESET states of all registers.
A simplified block diagram of the on-chip RESET circuit
is shown in Figure 14-6.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 17-6 for pulse width
specification.
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset (normal operation)
WDT Wake-up (SLEEP)
Brown-out Detect (BOD)
See Table 14-4 for timeout situations.
RESET
PIC16F62X
S
R
DS40300C-page 95
Q
Q
Chip_Reset
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