PIC16F628-20I/P Microchip Technology Inc., PIC16F628-20I/P Datasheet - Page 80
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F628-20I/P
Manufacturer Part Number
PIC16F628-20I/P
Description
18 PIN, 3.5 KB FLASH, 224 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F628-20IP.pdf
(170 pages)
Specifications of PIC16F628-20I/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
16
Interface
SCI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
224 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F628-20I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16F62X
FIGURE 12-9:
FIGURE 12-10:
FIGURE 12-11:
DS40300C-page 78
Note 1: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG
Note 1: This timing diagram shows an address byte followed by an data byte. The data byte is not read into the RCREG
RB1/RX/DT (PIN)
RB1/RX/DT (PIN)
RB1/RX/DT (PIN)
Note 1: This timing diagram shows an address byte followed by an data byte. The data byte is read into the RCREG
RCV SHIFT REG
RCV BUFFER REG
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
ADEN = 1
(ADDRESS MATCH
RCV SHIFT
REG
RCV BUFFER REG
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
ADEN = 1
(ADDRESS MATCH
RCV SHIFT
REG
RCV BUFFER REG
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
ADEN
(ADDRESS MATCH
ENABLE)
ENABLE)
ENABLE)
(Receive Buffer) because ADEN = 1 and Bit 8 = 0.
(receive buffer) because ADEN was not updated (still = 1) and Bit 8 = 0.
(Receive Buffer) because ADEN was updated after an address match, and was cleared to a ‘0’, so the contents of
the Receive Shift Register (RSR) are read into the Receive Buffer regardless of the value of Bit 8.
'1'
'1'
START
START
START
BIT
BIT
BIT
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST FOLLOWED BY
VALID DATA BYTE
BIT0
BIT0
BIT0
BIT8 = 1, ADDRESS BYTE
BIT8 = 1, ADDRESS BYTE
BIT8 = 0, DATA BYTE
BIT1
BIT1
BIT1
BIT8
BIT8
BIT8
STOP
STOP
STOP
Preliminary
BIT
BIT
BIT
WORD 1
RCREG
WORD 1
RCREG
START
START
START
BIT
BIT
BIT
BIT8 = 1, ADDRESS BYTE
BIT0
BIT0
BIT0
BIT8 = 0, DATA BYTE
BIT8 = 0, DATA BYTE
BIT8
BIT8
BIT8
STOP
STOP
STOP
BIT
BIT
BIT
WORD 2
RCREG
WORD 1
RCREG
2003 Microchip Technology Inc.
'1'
'1'
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