PIC18F4431-I/P Microchip Technology Inc., PIC18F4431-I/P Datasheet - Page 178
PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 36 I/O; 40-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4431-IP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
A/d Inputs
9-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC18F2331/2431/4331/4431
16.2.6.1
The event pulses are reduced by a fixed ratio by the
velocity pulse divider. The divider is useful for
high-speed measurements where the velocity events
happen frequently. By producing a single output pulse
for a given number of input event pulses, the counter
can track larger pulse counts (i.e., distance travelled)
for a given time interval. Time is measured by utilizing
the TMR5 time base.
FIGURE 16-12:
DS39616B-page 176
CAP3/QEB
CAP2/QEA
CAP1/INDX
Velocity Event Timing
VELOCITY MEASUREMENT BLOCK DIAGRAM
QEB
QEA
INDX
QEI
Control
Logic
Velocity Event
Direction
Clock
Preliminary
Postscaler
Reset
Logic
Position
Counter
TMR5 Reset
Each velocity pulse serves as a capture pulse. With the
TMR5 in Synchronous Timer mode, the value of TMR5
is captured on every output pulse of the postscaler. The
counter is subsequently reset to ‘0’. TMR5 is reset
upon a capture event.
Figure 16-13 shows the velocity measurement timing
diagram.
Velocity Capture
(VELR Register)
TMR5
2003 Microchip Technology Inc.
IC1
16
Clock
Velocity Mode
T
CY
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