PIC18F4431-I/P Microchip Technology Inc., PIC18F4431-I/P Datasheet - Page 261
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 36 I/O; 40-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4431-IP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
A/d Inputs
9-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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TABLE 20-3:
2003 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
ADCON3
ADCHS
ANSEL0
ANSEL1
PORTA
TRISA
PORTE
TRISE
LATE
Legend:
Note 1:
Name
(3)
(3)
2:
3:
4:
5:
6:
(2)
TRISA7
A/D Result Register High Byte
A/D Result Register Low Byte
x = unknown, u = unchanged, – = unimplemented, read as ‘0’, q = value depends on condition.
Shaded cells are not used for A/D conversion.
RE3 port bit is available only as an input pin when MCLRE bit in configuration register is ‘
This register is not implemented on PIC18F2X31 devices.
These bits are not implemented on PIC18F2X31 devices.
These pins may be configured as port pins depending on the Oscillator mode selected.
ANS5 through ANS8 are available only on the PIC18F4X31 devices.
Not available on 28-pin devices.
GDSEL1
OSCFIE
OSCFIP
OSCFIF
ANS7
VCFG1
ADRS1
PSPIE
PSPIP
PSPIF
ADFM
RA7
GIEH
Bit 7
GIE/
IBF
—
—
—
—
(4)
(6)
(4)
SUMMARY OF A/D REGISTERS
TRISA6
GDSEL0
ANS6
VCFG0
ACQT3
ADRS0
RA6
PEIE/
CMIE
CMIP
ADIE
ADIP
CMIF
GIEL
ADIF
Bit 6
OBE
—
—
—
—
(4)
(6)
(4)
Data Direction Control Register for PORTA
GBSEL1
TMR0IE
ACONV
ANS5
ACQT2
RCIF
RCIE
RCIP
IBOV
Bit 5
RA5
—
—
—
—
—
—
—
—
(6)
PSPMODE
ACMOD1 ACMOD0
GBSEL0
FIFOEN
ACQT1
SSRC4
INT0IE
ANS4
EEIE
EEIP
Bit 4
TXIF
TXIE
TXIP
EEIF
RA4
PIC18F2331/2431/4331/4431
—
—
—
Preliminary
PORTE Output Data Latch
GCSEL1 GCSEL0
BFEMT
ACQT0
SSRC3
SSPIF
SSPIE
SSPIP
BCLIF
BCLIE
BCLIP
RE3
ANS3
RBIE
Bit 3
RA3
—
—
(1)
Read PORTE Pins, Write Late
PORTE Data Direction
BFOVFL
TMR0IF
CCP1IF
CCP1IE
CCP1IP
ADCS2
SSRC2
LVDIF
LVDIE
LVDIP
CHS0
ANS2
Bit 2
RA2
—
GO/DONE
ADPNT1
GASEL1
TMR2IE
TMR2IP
TMR3IE
TMR3IP
TMR2IF
TMR3IF
ADCS1
SSRC1
INT0IF
ANS1
Bit 1
RA1
—
ADPNT0 --00 qqqq
GASEL0 0000 0000
TMR1IF
TMR1IE
TMR1IP
CCP2IF
CCP2IE
CCP2IP
ANS8
ADCS0
SSRC0
ADON
ANS0
Bit 0
RBIF
RA0
(5)
(4)
0
’.
0000 0000
0000 0000
0000 0000
1111 1111
00-0 0000
00-0 0000
11-1 1111
xxxx xxxx
xxxx xxxx
00-1 0000
0-00 0000
00-0 0000
1111 1111
---- ---1
--0x 0000
--11 1111
---- xxxx
0000 -111
---- -xxx
POR, BOR
Value on
DS39616B-page 259
0000 0000
0000 0000
0000 0000
1111 1111
00-0 0000
00-0 0000
11-1 1111
uuuu uuuu
uuuu uuuu
00-1 0000
--00 qqqq
0-00 0000
00-0 0000
0000 0000
1111 1111
---- ---1
--0u 0000
--11 1111
---- uuuu
0000 -111
---- -uuu
Value on
all other
Resets
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