PIC18F4431-I/P Microchip Technology Inc., PIC18F4431-I/P Datasheet - Page 386
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PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 36 I/O; 40-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4431-IP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
A/d Inputs
9-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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Quantity:
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PIC18F2331/2431/4331/4431
CKE bit ............................................................................. 212
CKP bit ............................................................................. 213
Clock Sources .................................................................... 26
Clocking Scheme/Instruction Cycle .................................... 61
CLRF ................................................................................ 303
CLRWDT .......................................................................... 303
Code Examples
Code Protection ....................................................... 267, 283
COMF ............................................................................... 304
Compare (CCP Module) ................................................... 154
Computed GOTO ............................................................... 63
Configuration Bits ............................................................. 267
Configuration Register Protection .................................... 286
Context Saving During Interrupts ..................................... 106
Control Registers
Conversion Considerations .............................................. 380
CPFSEQ .......................................................................... 304
CPFSGT ........................................................................... 305
CPFSLT ........................................................................... 305
Crystal Oscillator/Ceramic Resonator ................................ 21
D
D/A Bit .............................................................................. 212
Data EEPROM Code Protection ...................................... 286
Data EEPROM Memory ..................................................... 85
DS39616B-page 384
CCP2 ........................................................................ 152
Compare Mode. See Compare.
PWM Mode. See PWM.
Timer Resources ...................................................... 152
Selection Using OSCCON Register ........................... 26
16 x 16 Signed Multiply Routine ................................. 90
16 x 16 Unsigned Multiply Routine ............................. 90
8 x 8 Signed Multiply Routine ..................................... 89
8 x 8 Unsigned Multiply Routine ................................. 89
Changing Between Capture Prescalers ................... 153
Computed GOTO Using an Offset Value ................... 63
Data EEPROM Read ................................................. 87
Data EEPROM Refresh Routine ................................ 88
Data EEPROM Write .................................................. 87
Erasing a Flash Program Memory Row ..................... 80
Fast Register Stack .................................................... 60
How to Clear RAM (Bank 1) Using Indirect
Implementing a Real-Time Clock Using a
Initializing PORTA .................................................... 107
Initializing PORTB .................................................... 112
Initializing PORTC .................................................... 118
Initializing PORTD .................................................... 124
Initializing PORTE .................................................... 129
Reading a Flash Program Memory Word ................... 79
Saving Status, WREG and
Writing to Flash Program Memory ....................... 82–83
Associated Registers ............................................... 155
CCP Pin Configuration ............................................. 154
CCPR1 Register ....................................................... 154
Software Interrupt ..................................................... 154
Special Event Trigger ............................................... 154
Timer1 Mode Selection ............................................ 154
EECON1 and EECON2 .............................................. 76
Associated Registers ................................................. 88
EEADR Register ........................................................ 85
EECON1 and EECON2 Registers ............................. 85
CCPR2H Register ............................................ 152
CCPR2L Register ............................................ 152
Addressing ......................................................... 71
Timer1 Interrupt Service .................................. 141
BSR Registers in RAM ..................................... 106
Data Memory ..................................................................... 63
Data/Address Bit (D/A) ..................................................... 212
DAW ................................................................................ 306
DC and AC Characteristics
DC Characteristics ............................................339, 340, 349
DCFSNZ .......................................................................... 307
DECF ............................................................................... 306
DECFSZ .......................................................................... 307
Demonstration Boards
Development Support ...................................................... 331
Device Differences ........................................................... 379
Device Overview .................................................................. 7
Direct Addressing ............................................................... 72
E
Effects of Power Managed Modes on Various
Electrical Characteristics .................................................. 337
Enhanced Universal Synchronous Asynchronous
Equations
Errata ................................................................................... 6
Evaluation and Programming Tools ................................. 335
External Clock Input ........................................................... 23
F
Fail-Safe Clock Monitor .............................................267, 281
Fast Register Stack ............................................................ 60
Firmware Instructions ....................................................... 287
Flash Program Memory ..................................................... 75
Operation During Code-Protect ................................. 88
Protection Against Spurious Write ............................. 87
Reading ..................................................................... 87
Using .......................................................................... 88
Write Verify ................................................................ 87
Writing ........................................................................ 87
General Purpose Registers ....................................... 63
Map for PIC18F2X31/4X31 ........................................ 64
Special Function Registers ........................................ 65
Graphs and Tables (Preliminary) ............................. 371
PICDEM 1 ................................................................ 334
PICDEM 17 .............................................................. 334
PICDEM 18R PIC18C601/801 ................................. 335
PICDEM 2 Plus ........................................................ 334
PICDEM 3 PIC16C92X ............................................ 334
PICDEM 4 ................................................................ 334
PICDEM LIN PIC16C43X ........................................ 335
PICDEM USB PIC16C7X5 ...................................... 335
PICDEM.net Internet/Ethernet ................................. 334
Features (table) ........................................................... 9
New Core Features ...................................................... 7
Other Special Features ................................................ 8
Clock Sources ............................................................ 29
Receiver Transmitter (USART) ................................ 221
16 x 16 Signed Multiplication Algorithm ..................... 90
16 x 16 Unsigned Multiplication Algorithm ................. 90
A/D Acquisition Time ............................................... 253
A/D Minimum Charging Time ................................... 253
Interrupts in Power-Managed Modes ....................... 282
POR or Wake from Sleep ........................................ 282
WDT During Oscillator Failure ................................. 281
Associated Registers ................................................. 83
Control Registers ....................................................... 76
Erase Sequence ........................................................ 80
Erasing ....................................................................... 80
Operation During Code-Protect ................................. 83
Reading ..................................................................... 79
TABLAT Register ....................................................... 78
2003 Microchip Technology Inc.