DSPIC30F4013-20I/PT Microchip Technology Inc., DSPIC30F4013-20I/PT Datasheet - Page 136

• Manufacturer Part Number: DSPIC30F4013-20I/PT
• Description: 16 BIT MCU/DSP 44LD 20MIPS 48 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F4013-20I/PT

• A/d Inputs: 13-Channels, 12-Bit
• Comparators: 4
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: CAN, I2C/SPI/UART, USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 44-pin TQFP
• Programmable Memory: 48K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part

dsPIC30F2011/2012/3012/3013
All instructions are a single word, except for certain
double-word instructions, which were made double-
word instructions so that all the required information is
available in these 48 bits. In the second word, the
8 MSbs are ‘0’s. If this second word is executed as an
instruction (by itself), it will execute as a NOP.
Most single-word instructions are executed in a single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a NOP. Notable exceptions are the BRA (uncondi-
tional/computed branch), indirect CALL/GOTO, all table
reads and writes, and RETURN/RETFIE instructions,
TABLE 18-1:
DS70139D-page 134
#text
(text)
[text]
{ }
<n:m>
.b
.d
.S
.w
Acc
AWB
bit4
C, DC, N, OV, Z
Expr
f
lit1
lit4
lit5
lit8
lit10
lit14
lit16
lit23
None
OA, OB, SA, SB
PC
Slit10
Slit16
Slit6
Field
SYMBOLS USED IN OPCODE DESCRIPTIONS
4-bit bit selection field (used in word addressed instructions)
MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero
Field does not require an entry, may be blank
DSP Status bits: ACCA Overflow, ACCB Overflow, ACCA Saturate, ACCB Saturate
Means literal defined by “text”
Means “content of text”
Means “the location addressed by text”
Optional field or operation
Register bit field
Byte mode selection
Double-Word mode selection
Shadow register select
Word mode selection (default)
One of two accumulators {A, B}
Accumulator write-back destination address register
Absolute address, label or expression (resolved by the linker)
File register address
1-bit unsigned literal
4-bit unsigned literal
5-bit unsigned literal
8-bit unsigned literal
10-bit unsigned literal
14-bit unsigned literal
16-bit unsigned literal
23-bit unsigned literal
Program Counter
10-bit signed literal
16-bit signed literal
6-bit signed literal
{-16...16}
{-512...511}
{-32768...32767}
{0,1}
{0...15}
{0...31}
{0...255}
{0x0000...0x1FFF}
{0...255} for Byte mode, {0:1023} for Word mode
{0...16384}
{0...65535}
{0...8388608}; LSB must be 0
which are single-word instructions but take two or three
cycles. Certain instructions that involve skipping over
the subsequent instruction require either two or three
cycles if the skip is performed, depending on whether
the instruction being skipped is a single-word or two-
word instruction. Moreover, double-word moves
require two cycles. The double-word instructions
execute in two instruction cycles.
Note:
Description
For more details on the instruction set,
refer to the Programmer’s Reference
Manual.
{W13, [W13]+=2}
© 2006 Microchip Technology Inc.
{0...15}