ISP1504A1ETTM ST-Ericsson Inc, ISP1504A1ETTM Datasheet - Page 11

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ISP1504A1ETTM

Manufacturer Part Number
ISP1504A1ETTM
Description
IC USB TXRX HS 36-TFBGA
Manufacturer
ST-Ericsson Inc
Type
Transceiverr
Datasheet

Specifications of ISP1504A1ETTM

Protocol
USB 2.0
Voltage - Supply
3 V ~ 4.5 V
Mounting Type
Surface Mount
Package / Case
36-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Other names
ISP1504A1ET-T
ISP1504A1ET-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1504A1ETTM
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Part Number:
ISP1504A1ETTM
Manufacturer:
ST
0
NXP Semiconductors
ISP1504A1_ISP1504C1_1
Product data sheet
7.9.1 DATA[7:0]
7.9.2 V
7.9.3 RREF
7.7 Band gap reference voltage
7.8 Power-On Reset (POR)
7.9 Detailed description of pins
The band gap circuit provides a stable internal voltage reference to bias analog circuitry.
The band gap requires an accurate external reference resistor. Connect a 12 k
resistor between the RREF pin and GND.
The ISP1504x1 has an internal POR circuit that resets all internal logic on power-up. The
ULPI interface is also reset on power-up.
Remark: When CLOCK starts toggling after power-up, the USB link must issue a reset
command over the ULPI bus to ensure correct operation of the ISP1504x1.
Bidirectional data bus. The USB link must drive DATA[7:0] to LOW when the ULPI bus is
idle. When the link has data to transmit to the PHY, it drives a nonzero value.
The data bus can be reconfigured to carry various data types, as given in
Section
The DATA[7:0] pins can be 3-stated by driving pin CS_N/PWRDN to HIGH. Weak
pull-down resistors are incorporated into the DATA[7:0] pins as part of the interface protect
feature. For details, see
The input voltage that sets the I/O voltage level. The ISP1504x1 supports nominal I/O
voltages in the range of 1.8 V to 3.3 V. A 0.1 F decoupling capacitor is recommended.
V
If V
Resistor reference analog I/O pin. A 12 k
RREF and GND, as shown in
biases internal analog circuitry. Less accurate resistors cannot be used and will render the
ISP1504x1 unusable.
CC(I/O)
CC(I/O)
CC(I/O)
CLOCK
CS_N/PWRDN
DATA[7:0]
DIR
NXT
RESET_N
STP
provides power to on-chip pads of the following pins:
9.
is not present while V
Rev. 01 — 6 August 2007
Section
Section
CC
9.3.1.
is present, the chip is put in power-down mode.
15. This provides an accurate voltage reference that
ISP1504A1; ISP1504C1
1 % resistor must be connected between
ULPI HS USB OTG transceiver
© NXP B.V. 2007. All rights reserved.
Section 8
1 %
10 of 80
and

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