ICS1893YI-10LF IDT, Integrated Device Technology Inc, ICS1893YI-10LF Datasheet - Page 76

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ICS1893YI-10LF

Manufacturer Part Number
ICS1893YI-10LF
Description
PHYCEIVER LOW PWR 3.3V 64-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheets

Specifications of ICS1893YI-10LF

Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Compliant
Other names
1893YI-10LF

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7.5 Register 3: PHY Identifier Register
7.5.1 OUI bits 19-24 (bits 3.15:10)
7.5.2 Manufacturer’s Model Number (bits 3.9:4)
ICS1893Y-10 Rev F 1/20/04
Table 7-9
that are part of a set defined by the ISO/IEC specification. This register stores the following:
All the bits in the two PHY Identifier Registers are Command Override Write bits. An STA can read them at
any time without condition. However, An STA can modify these register bits only when the Command
Register Override bit (bit 16.15) is enabled with a logic one.
Note:
Table 7-9. PHY Identifier Register (Register 3 [0x03])
The most-significant 6 bits of register 3 (that is, bits 3.15:10) include OUI bits 19 through 24. OUI bit 19 is
stored in bit 3.15, while OUI bit 24 is stored in bit 3.10.
The model number for the ICS1893Y-10 is 4 (decimal). It is stored in bit 3.9:4 as 00100b.
3.15
3.14
3.13
3.12
3.10
3.11
Part of the OUI [see the text in
Manufacturer’s PHY Model Number
Manufacturer’s PHY Revision Number
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3.0
Bit
ICS1893Y-10 Data Sheet - Release
For an explanation of acronyms used in
OUI bit 19 | s
OUI bit 20 | t
OUI bit 21 | u
OUI bit 22 | v
OUI bit 23 | w
OUI bit 24 | x
Manufacturer’s Model Number bit 5
Manufacturer’s Model Number bit 4
Manufacturer’s Model Number bit 3
Manufacturer’s Model Number bit 2
Manufacturer’s Model Number bit 1
Manufacturer’s Model Number bit 0
Revision Number bit 3
Revision Number bit 2
Revision Number bit 1
Revision Number bit 0
lists the bits for PHY Identifier Register (Register 3), which is one of two PHY Identifier Registers
Definition
Copyright © 2004, Integrated Circuit Systems, Inc.
Section 7.4, “Register 2: PHY Identifier
All rights reserved.
When Bit = 0 When Bit = 1
N/A
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76
Table
7-5, see
N/A
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Chapter 1, “Abbreviations and
Access
Chapter 7 Management Register Set
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
CW
Register”]
Function
Special
Default
January, 2004
Acronyms”.
1
1
1
1
0
1
0
0
0
1
0
0
0
0
0
1
Hex
F
4
4
1

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