WM8310GEB/V Wolfson Microelectronics, WM8310GEB/V Datasheet
WM8310GEB/V
Specifications of WM8310GEB/V
Related parts for WM8310GEB/V
WM8310GEB/V Summary of contents
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... Package Options • 7x7mm, 169-ball BGA package, 0.5mm ball pitch APPLICATIONS • Portable Media Players • Portable Navigation Devices • Cellular Handsets • Electronic Books • Electronic Gaming Devices http://www.wolfsonmicro.com/enews WM8310 Pre-Production, December 2009, Rev 3.0 Copyright ©2009 Wolfson Microelectronics plc ...
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WM8310 BLOCK DIAGRAM DBVDD Interrupt and DBGND Reset Controller PROGVDD System Register Map and LED1 Status Application Processor LED2 LED Driver GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 Multi- GPIO6 Function Pin GPIO7 (GPIO) GPIO8 Controller GPIO9 GPIO10 GPIO11 GPIO12 ON AUXADCIN1 ...
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Pre-Production TYPICAL APPLICATIONS The WM8310 is designed as a system PMIC device that manages multiple power supply paths (wall adapter, USB, battery) and generates configurable DC supplies to power processors and associated peripherals within a system. The WM8310 provides three ...
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WM8310 DESCRIPTION ....................................................................................................... 1 FEATURES............................................................................................................. 1 APPLICATIONS ..................................................................................................... 1 BLOCK DIAGRAM ................................................................................................. 2 TYPICAL APPLICATIONS ..................................................................................... 3 TABLE OF CONTENTS ......................................................................................... 4 1 PIN CONFIGURATION .................................................................................. 8 2 ORDERING INFORMATION .......................................................................... 8 3 PIN DESCRIPTION ........................................................................................ 9 4 THERMAL CHARACTERISTICS ...
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Pre-Production 12.6 SOFTWARE SCRATCH REGISTER .............................................................. 44 13 CLOCKING AND OSCILLATOR CONTROL ............................................... 45 13.1 GENERAL DESCRIPTION ............................................................................. 45 13.2 CRYSTAL OSCILLATOR ................................................................................ 47 13.3 FREQUENCY LOCKED LOOP (FLL) ............................................................. 48 13.3.1 FLL AUTO MODE ................................................................................................................ 51 14 BOOTSTRAPPING AND ...
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WM8310 15.13 POWER MANAGEMENT INTERRUPTS ........................................................ 88 15.14 POWER GOOD INDICATION ........................................................................ 89 15.15 DC-DC CONVERTER OPERATION ............................................................... 90 15.15.1 OVERVIEW...................................................................................................................... 90 15.15.2 DC-DC STEP DOWN CONVERTERS ............................................................................. 90 15.15.3 DC-DC STEP UP CONVERTER ...................................................................................... 94 15.16 LDO REGULATOR OPERATION ...
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Pre-Production 22 SYSTEM STATUS LED DRIVERS ............................................................ 136 22.1 GENERAL DESCRIPTION ........................................................................... 136 22.2 LED DRIVER CONTROL .............................................................................. 136 22.2.1 OTP PROGRAM STATUS ................................................................................................. 136 22.2.2 POWER STATE STATUS .................................................................................................. 137 22.2.3 CHARGER STATUS .......................................................................................................... 137 22.2.4 LED DRIVER MANUAL ...
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... NA_N L LDO1VDD LDO1VOUT DBGND CLKOUT M GND DNC DNC DBGND N DNC DNC DBVDD2 CLKIN 2 ORDERING INFORMATION ORDER CODE TEMPERATURE RANGE (T WM8310GEB/V -40°C to +85°C WM8310GEB/RV -40°C to +85°C Note: Reel quantity = 2200 DC3LX DC3GND DC2VDD DC2LX DC3LX DC3GND DC2VDD DC2LX DNC DC2FB ...
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Pre-Production 3 PIN DESCRIPTION Notes: 1. Pins are sorted by functional groups. 2. The power domain associated with each pin is noted; VPMIC is the domain powered by LDO12 for the ‘always-on’ functions internal to the WM8310. PIN NAME Auxiliary ...
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WM8310 PIN NAME D7 SDA1 D10 CS ¯ ¯ Digital Input M9 SCLK2 H8 SDA2 D9, E9 DBVDD1 N3 DBVDD2 J12 DBVDD3 H13, K3, DBGND L3, M4 OTP Memory D4 PROGVDD DC-DC Converters and LDO Regulators B1, B2, B3, B13, ...
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Pre-Production PIN NAME G13 DC4GND E11 DC4FB Analogue Input G12 DC4LX Analogue I/O F13 DC4VDD L1 LDO1VDD L2 LDO1VOUT Analogue Output K1 LDO2VDD K2 LDO2VOUT Analogue Output J1 LDO3VDD J2 LDO3VOUT Analogue Output E1 LDO4VDD E2 LDO4VOUT Analogue Output D1 ...
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WM8310 PIN NAME Status LED Drivers J11 LED1 Digital Output K11 LED2 Digital Output Do Not Connect C5, H3, H10, H11, J13, K12, DNC M2, M3, N1 TYPE POWER DOMAIN Status LED Driver 1. Open Drain Output SYSVDD ...
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Pre-Production 4 THERMAL CHARACTERISTICS Thermal analysis must be performed in the intended application to prevent the WM8310 from exceeding maximum junction temperature. Several contributing factors affect thermal performance most notably the physical properties of the mechanical enclosure, location of the ...
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WM8310 5 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical ...
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Pre-Production 6 RECOMMENDED OPERATING CONDITIONS PARAMETER Wall Input power source WALLVDD Battery Input power source BATTVDD USB Input power source USBVDD Backup Battery power source BACKUPVDD Digital buffer supply DBVDD1, DBVDD2, DBVDD3 OTP Programming Supply PROGVDD (see note) LDO12VOUT Ground ...
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WM8310 7 ELECTRICAL CHARACTERISTICS 7.1 DC-DC STEP DOWN CONVERTERS DC-DC1 and DC-DC2 Unless otherwise noted 3.8V PARAMETER SYMBOL Input Voltage V IN Programmable V F OUT Output Voltage F V Step Size V OUT OUT_STEP V ...
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Pre-Production DC-DC3 Unless otherwise noted 3.8V OUT PARAMETER SYMBOL Input Voltage V IN Programmable V OUT Output Voltage V Step Size V OUT OUT_STEP V Accuracy V V OUT IN OUT_ACC Output Current FCCM I OUT ...
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WM8310 7.3 CURRENT SINKS Unless otherwise noted -40°C to +85ºC; Typical values are PARAMETER Sink Current Current Accuracy Current matching 7.4 LDO REGULATORS LDO1 Unless otherwise noted 3.8V PARAMETER SYMBOL Input ...
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Pre-Production PARAMETER SYMBOL Low power mode, LDOn_LP_MODE=0 Low power mode, LDOn_LP_MODE=1 V Accuracy V I OUT LOAD OUT_ACC Line Regulation V V OUT LINE IN Note that V Load Regulation V I OUT LOAD LOAD Dropout Voltage ...
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WM8310 PARAMETER SYMBOL (Switch mode Current Limit (Switch mode) Start-up time t No load, Output cap 2.2 μF, 90 start_up Shutdown time t No load, Output cap 2.2 μF, 10 ...
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Pre-Production PARAMETER SYMBOL Line Regulation V V OUT LINE IN Note that V Load Regulation V I OUT LOAD LOAD Dropout Voltage OUT LOAD I LOAD I LOAD Undervoltage V V OUT OUT level Quiescent ...
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WM8310 PARAMETER VPMIC (LDO12VOUT) voltage at which device transitions between BACKUP and OFF states Device Reset hysteresis Device Shutdown Shutdown threshold SYSVDD voltage at which the device forces an OFF transition SYSOK threshold accuracy SYSVDD voltage at which SYSOK is ...
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Pre-Production PARAMETER Maximum fast charge current Supply voltage regulation level (Current throttling is applied if supply drops to this level) Internal Battery FET ‘On’ Resistance Battery Temperature Monitoring NTCMON voltage for high battery temperature detection NTCMON voltage for low battery ...
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WM8310 7.10 GENERAL PURPOSE INPUTS / OUTPUTS (GPIO) GPIO1 to GPIO12 Unless otherwise noted -40°C to +85ºC; Typical values are PARAMETER Input HIGH Level Input LOW Level Output HIGH Level Output LOW Level Sink / ...
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Pre-Production 8 TYPICAL POWER CONSUMPTION Data to follow w WM8310 PP, December 2009, Rev 3.0 25 ...
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WM8310 9 TYPICAL PERFORMANCE DATA 9.1 DC-DC CONVERTERS Data to follow 9.2 LDO REGULATORS Data to follow w Pre-Production PP, December 2009, Rev 3.0 26 ...
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Pre-Production 10 SIGNAL TIMING REQUIREMENTS 10.1 CONTROL INTERFACE Figure 1 Control Interface Timing - 2-wire (I2C) Control Mode Test Conditions T = -40ºC to +125 ºC unless otherwise stated. J PARAMETER SCLK1 Frequency SCLK1 Low Pulse-Width SCLK1 High Pulse-Width Hold ...
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WM8310 t CSU CS (input) SCLK1 (input) SDA1 (input) Figure 2 Control Interface Timing - 4-wire (SPI) Control Mode (Write Cycle) CS (input) SCLK1 (input) SDOUT1 (output) Figure 3 Control Interface Timing - 4-wire (SPI) Control Mode (Read Cycle) Test ...
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Pre-Production 11 DEVICE DESCRIPTION 11.1 GENERAL DESCRIPTION The WM8310 is a multi-purpose Power Management device with a comprehensive range of features. The WM8310 provides 4 DC-DC Converters and 11 LDO Regulators which are all programmable to application-specific requirements. The on-board ...
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WM8310 PROGRAM - This is a special operating state which is used for programming the integrated OTP memory with the device configuration data. The settings stored in the OTP define the device configuration in the ON state, and also the ...
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Pre-Production The remaining transitions between the OFF, ON and SLEEP states may be initiated by a number of different mechanisms - some of them automatic, some of them user-controlled. Transitions between these states are time-controlled sequences of events. These are ...
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WM8310 Figure 5 Example Control Sequence for ‘ON’ State Transition The possible ‘ON’ events that may trigger the ON sequence are listed in Table 3. The ON sequence is only permitted when the supply voltage SYSVDD exceeds a programmable threshold ...
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Pre-Production LDOs to power up. If the ON sequence has not completed within 2 seconds of starting the transition, then a Power Sequence Failure has occurred, resulting in the OFF state being forced. The most recent ON or WAKE event ...
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WM8310 ADDRESS R16399 (400Fh) OFF Source Table 2 Power State Control Registers Table 3 lists all of the events which can trigger an ON, WAKE, OFF or SLEEP transition sequence. It also lists the associated status bits of the ‘ON ...
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Pre-Production TRANSITION EVENT SEQUENCE ON (see note 1) RTC alarm GPIO ON request ON ¯ ¯ pin request WAKE Software WAKE Battery Charger event Watchdog timeout RTC alarm GPIO WAKE request SYSVDD undervoltage ON ¯ ¯ pin request OFF (see ...
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WM8310 3. These Reset conditions result in an OFF transition followed transition. These events are recorded as Reset events in the ‘ON Source’ register. 4. SLEEP events are not recorded in the ‘OFF Source’ register. 11.4 POWER ...
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Pre-Production 11.6 ON PIN FUNCTION The ON ¯ ¯ pin is intended for connection to the master power switch on the user’s application. It can be used to start-up the WM8310 from the SLEEP or OFF states and also to ...
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WM8310 ADDRESS R16401 (4011h) Interrupt Status 1 R16409 (4019h) Interrupt Status 1 Mask Table 6 ON Pin Interrupt 11.7 RESET PIN FUNCTION The RESET ¯ ¯ ¯ ¯ ¯ ¯ pin is an active low input/output which is used to ...
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Pre-Production The WM8310 can generate an Auxiliary Reset output via a GPIO pin configured as “Auxiliary Reset” output (see Section 21). This signal is asserted in the OFF state. The status of the Auxiliary Reset in the SLEEP state is ...
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WM8310 12 CONTROL INTERFACE 12.1 GENERAL DESCRIPTION The WM8310 is controlled by writing to its control registers. Readback is available for all registers, including Chip ID, power management status and GPIO status. The control interface can operate as a 2-wire ...
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Pre-Production Figure 7 Control Interface 2-wire (I2C) Register Write The sequence of signals associated with a single register read operation is illustrated in Figure 8. Figure 8 Control Interface 2-wire (I2C) Register Read The Control Interface also supports other register ...
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WM8310 S Device ID A MSByte Address RW (0) Figure 10 Single Register Read from Specified Address Figure 11 Multiple Register Write to Specified Address using Auto-increment Figure 12 Multiple Register Read from Specified Address using Auto-increment Figure 13 Multiple ...
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Pre-Production 12.3 4-WIRE (SPI) CONTROL MODE In this mode, the WM8310 registers are accessed using a 4-wire serial control interface. The CS SCLK1 pins provide the ‘Chip Select’ and ‘Serial Data Clock’ functions respectively. Serial data input is supported on ...
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WM8310 ADDRESS R16392 (4008h) Security Key Table 13 Security Key Register 12.5 SOFTWARE RESET AND CHIP ID A Software Reset can be commanded by writing to Register 0000h. This is a read-only register field and the contents of this register ...
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Pre-Production 13 CLOCKING AND OSCILLATOR CONTROL 13.1 GENERAL DESCRIPTION The WM8310 incorporates a 32.768kHz crystal oscillator in order to maintain the Real Time Clock (RTC). An external crystal is normally required. Alternatively, a 32.768kHz signal may be input directly on ...
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WM8310 A separate internal RC oscillator generates the required clocks for the integrated DC-DC Converters on the WM8310. Note that a 2MHz ‘External Power Clock’, derived from this oscillator, may be output on a GPIO pin to provide synchronised clocking ...
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Pre-Production ADDRESS Table 16 Clocking Control 13.2 CRYSTAL OSCILLATOR The crystal oscillator generates a 32.768kHz reference clock, which is used to provide reference clock for the Real Time Clock (RTC) in the WM8310. It may also be used as a ...
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WM8310 13.3 FREQUENCY LOCKED LOOP (FLL) The integrated FLL can be used to generate a clock on the CLKOUT pin from a wide variety of different reference sources and frequencies. The FLL can use either CLKIN or the 32.768kHz oscillator ...
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Pre-Production In order to follow the above requirements for F according to the desired output F range 90-100MHz. The available divisions are integers from 4 to 64. Some typical settings of FLL_OUTDIV are noted in Table 18. OUTPUT FREQUENCY F ...
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WM8310 The register fields that control the FLL are described in Table 20. ADDRESS R16530 (4092h) FLL Control 1 R16531 (4093h) FLL Control 2 R16532 (4094h) FLL Control 3 R16533 (4095h) FLL Control 4 w BIT LABEL DEFAULT FLL_FRAC 2 ...
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Pre-Production ADDRESS R16534 (4096h) FLL Control 5 Table 20 FLL Control 13.3.1 To simplify the configuration of the FLL, an ‘automatic’ mode is provided in order to synthesize a number of commonly used reference frequencies using the 32.768kHz crystal oscillator ...
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WM8310 14 BOOTSTRAPPING AND OTP MEMORY CONTROL 14.1 GENERAL DESCRIPTION The WM8310 is a highly configurable device which can be tailored specifically to the requirements of a complex system application. The sequencing and voltage control of the integrated DC-DC Converters ...
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Pre-Production The DORW contains 5 pages of data, as illustrated in Figure 18. Page 0 of the DORW contains a 128-bit pseudo-random unique ID. The unique ID is written to the OTP at the time of manufacture copied ...
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WM8310 14.3.2 Development mode is selected if a logic high level (referenced to the LDO12 VPMIC voltage) is present on SCLK2. This should be implemented using a pull-up resistor. See Section 14.3.4 for details of the External DBE Memory connection. ...
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Pre-Production Figure 19 DBE Memory Connection Note that the WM8310 does not support programming the external DBE memory. External programming of DBE whilst physically connected to the WM8310 is possible by putting the WM8310 in the OFF state. This is ...
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WM8310 The OTP and DBE Memory commands are each described in the following sections. Note that, in some cases, commands may be executed on a single page of memory or may be executed as a Bulk operation on all available ...
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Pre-Production 14.4.3 The Write command programs one or more data pages of the OTP with data from the corresponding page(s) of the DORW. The Write commands are selected by writing 1 to the OTP_WRITE bit. The OTP memory is selected ...
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WM8310 OTP Verify Page 0 OTP Verify Page 1 OTP Verify Page 2 OTP Verify Page 3 OTP Verify All Table 25 OTP Verify Command (Margin 1) 14.4.5 The Finalise command sets the OTP finalise bit for the user-programmable pages ...
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Pre-Production 14.4.6 The OTP Control register (R16394) is defined in Table 27. Note that some of the OTP Programming registers are locked by the WM8310 User Key. These registers can only be changed by writing the appropriate code to the ...
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WM8310 ADDRESS Table 27 OTP Memory Control 14.5 OTP / DBE INTERRUPTS The OTP and DBE memories are associated with two Interrupt event flags. The OTP_CMD_END_EINT interrupt is set each time an OTP / DBE Command has completed or if ...
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Pre-Production 14.6.1 Page 0 of the DORW occupies register addresses R30720 (7800h) to R30727 (7807h). This contains factory-preset data which is loaded from OTP when an ‘ON’ state transition is scheduled. Page 0 of the DORW contains a 128-bit unique ...
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WM8310 ADDRESS R30736 (7810h) Customer OTP ID Table 29 OTP Registers - DORW Page 2 The remaining contents of DORW Page 2 include the registers listed in Table 30, which are defined in other sections of this datasheet. DC1_ON_SLOT [2:0] ...
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Pre-Production This page of data is normally loaded from OTP when ‘ON’ state transition is scheduled (except in Development Mode or if RECONFIG_AT_ON = 0). This page of data can also be loaded from OTP using the OTP_READ command; it ...
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WM8310 GP5_POL GP5_OD GP5_ENA GP5_FN [3:0] GP6_DIR GP6_PULL [1:0] GP6_INT_MODE GP6_PWR_DOM GP6_POL GP6_OD GP6_ENA GP6_FN [3:0] CLKOUT_SLOT [2:0] CLKOUT_SRC XTAL_ENA XTAL_INH FLL_AUTO_FREQ [2:0] USB_ILIM [2:0] USB100MA_STARTUP [1:0] CHG_ENA WDOG_ENA LED1_SRC [1:0] LED2_SRC [1:0] SYSOK_THR [2:0] Table 31 DORW Page 3 ...
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Pre-Production 15 POWER MANAGEMENT 15.1 GENERAL DESCRIPTION The WM8310 provides 4 DC-DC Converters and 11 LDO Regulators. The DC-DC Converters comprise 3 step-down (Buck) converters and 1 step-up (Boost) converter. The Regulators comprise general purpose LDOs (LDO1 - LDO6) and ...
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WM8310 15.3 TIMESLOT CONTROL AND HARDWARE ENABLE (GPIO) CONTROL The DC-DC Converters 1-3 and LDO Regulators 1-11 may be programmed to switch selected timeslot within the ON sequence using the DCm_ON_SLOT or LDOn_ON_SLOT fields. These register fields ...
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Pre-Production 15.4 OPERATING MODE CONTROL 15.4.1 The DC-DC (Buck) Converters DC-DC1, DC-DC2 and DC-DC3 can be configured to operate in four different operating modes. The operating modes are summarised in Table 33. For more detailed information on the DC-DC Step-Down ...
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WM8310 For the standard LDOs, LDO1 - LDO6, two different Low Power modes are provided, offering limited load current capability and reduced quiescent current. When Low Power mode is selected in the ON or SLEEP power states, then the LDOn_LP_MODE ...
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Pre-Production When LDO11_VSEL_SRC = 1, the output voltage of LDO11 follows the voltage selection of DC-DC Converter 1. This enables both domains to be changed at the same time, eg. the processor core and processor ‘alive’ domains. The LDO11 output ...
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WM8310 The WM8310 can indicate the status of the Dynamic Voltage Scaling via a GPIO pin configured as a “DC-DC1 DVS Done” or “DC-DC2 DVS Done” output (see Section 21). When a GPIO pin is configured to indicate the DVS ...
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Pre-Production When a Hardware Control input is assigned to DC-DC Buck Converters 1-3, and is asserted, the operating mode and output voltage of the relevant DC-DC Converters is determined by the DCm_HWC_VSEL and DCm_HWC_MODE fields; this takes precedence over the ...
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WM8310 The DC-DC3 Buck Converter has a selectable overvoltage protection feature, controlled by DC3_OVP. This affects the converter response when DC3 is enabled or when its output voltage is increased. When the overvoltage protection is enabled, there is less overshoot ...
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Pre-Production The Enable and Status register bits for the External Power Enable (EPE) Controls are defined in Table 35. ADDRESS R16464 (4050h) DCDC Enable R16466 (4052h) DCDC Status Table 35 External Power Enable (EPE) Control 15.12.2 DC-DC (BUCK) CONVERTER CONTROL ...
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WM8310 ADDRESS R16471 (4057h) DC1 Control 2 R16472 (4058h) DC1 ON Config w BIT LABEL DEFAULT 1:0 DC1_CAP 00 15:14 DC1_ERR_A 00 CT [1:0] 12:11 DC1_HWC_ 00 SRC [1:0] DC1_HWC_ 10 0 VSEL 9:8 DC1_HWC_ 11 MODE [1:0] DC1_HC_TH 6:4 ...
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Pre-Production ADDRESS R16473 (4059h) DC1 SLEEP Control w BIT LABEL DEFAULT 6:2 DC1_ON_VS 00000 EL [6:2] DC1_ON_VS 1 [1:0] 15:13 DC1_SLP_S 000 LOT [2:0] 9:8 DC1_SLP_M 00 ODE [1:0] 6:0 DC1_SLP_V 000_0000 SEL [6:0] WM8310 DESCRIPTION DC-DC1 ON ...
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WM8310 ADDRESS R16474 (405Ah) DC1 DVS Control R16475 (405Bh) DC2 Control 1 R16476 (405Ch) DC2 Control 2 R16477 (405Dh) DC2 ON Config R16478 (405Eh) DC2 SLEEP Control R16479 (405Fh) DC2 DVS Control w BIT LABEL DEFAULT 12:11 DC1_DVS_S 00 RC ...
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Pre-Production ADDRESS R16480 (4060h) DC3 Control 1 R16481 (4061h) DC3 Control 2 R16482 (4062h) DC3 ON Config R16483 (4063h) DC3 SLEEP Control w BIT LABEL DEFAULT 12 DC3_PHASE 0 7 DC3_FLT 0 5:4 DC3_SOFT_ 01 START [1:0] 3:2 DC3_STNBY 01 ...
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WM8310 ADDRESS Table 36 DC-DC (Buck) Converter Control 15.12.3 DC-DC (BOOST) CONVERTER CONTROL The register controls for configuring the DC-DC4 (Boost) Converter are defined in Table 37. Note that the DC4_RANGE control register is locked by the WM8310 User Key. ...
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Pre-Production ADDRESS R16488 (4068h) LDO1 Control R16489 (4069h) LDO1 ON Control w BIT LABEL DEFAULT 15:14 LDO1_ERR_ 00 ACT [1:0] 12:11 LDO1_HWC 00 _SRC [1:0] 10 LDO1_HWC 0 _VSEL LDO1_HWC 9:8 10 _MODE 7 LDO1_FLT 0 6 LDO1_SWI 0 0 ...
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WM8310 ADDRESS R16490 (406Ah) LDO1 SLEEP Control R16491 (406Bh) LDO2 Control R16492 (406Ch) LDO2 ON Control R16493 (406Dh) LDO2 SLEEP Control R16494 (406Eh) w BIT LABEL DEFAULT 15:13 LDO1_SLP_ 000 SLOT [2:0] LDO1_SLP_ 8 0 MODE LDO1_SLP_ 4:0 00000 VSEL ...
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Pre-Production ADDRESS LDO3 Control R16495 (406Fh) LDO3 ON Control R16496 (4070h) LDO3 SLEEP Control R16497 (4071h) LDO4 Control R16498 (4072h) LDO4 ON Control R16499 (4073h) LDO4 SLEEP Control R16500 (4074h) LDO5 Control w BIT LABEL DEFAULT 12:11 LDO3_HWC 00 _SRC ...
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WM8310 ADDRESS R16501 (4075h) LDO5 ON Control R16502 (4076h) LDO5 SLEEP Control R16503 (4077h) LDO6 Control R16504 (4078h) LDO6 ON Control R16505 (4079h) LDO6 SLEEP Control Table 38 LDO Regulators 1-6 Control The register controls for configuring the LDO Regulators ...
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Pre-Production ADDRESS R16507 (407Bh) LDO7 ON Control R16508 (407Ch) LDO7 SLEEP Control w BIT LABEL DEFAULT 10 LDO7_HWC 0 _VSEL 9:8 LDO7_HWC 00 _MODE 7 LDO7_FLT 0 6 LDO7_SWI 0 LDO7_ON_S 15:13 000 LOT [2:0] 8 LDO7_ON_ 0 MODE 4:0 ...
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WM8310 ADDRESS R16509 (407Dh) LDO8 Control R16510 (407Eh) LDO8 ON Control R16511 (407Fh) LDO8 SLEEP Control R16512 (4080h) LDO9 Control R16513 (4081h) LDO9 ON Control R16514 (4082h) LDO9 SLEEP Control w BIT LABEL DEFAULT 8 LDO7_SLP_ 0 MODE 4:0 LDO7_SLP_ ...
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Pre-Production ADDRESS R16515 (4083h) LDO10 Control R16516 (4084h) LDO10 ON Control R16517 (4085h) LDO10 SLEEP Control Table 39 LDO Regulators 7-10 Control The register controls for configuring the LDO Regulator 11 are defined in Table 40. Note that the LDO11_ON_SLOT ...
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WM8310 ADDRESS R16520 (4088h) LDO11 SLEEP Control Table 40 LDO Regulator 11 Control 15.12.5 EXTERNAL POWER ENABLE (EPE) CONTROL The register controls for configuring the External Power Enable (EPE) outputs are defined in Table 41. Note that the EPE1_ON_SLOT and ...
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Pre-Production ADDRESS R16487 (4067h) EPE2 Control Table 41 External Power Enable (EPE) Control 15.12.6 MONITORING AND FAULT REPORTING The overvoltage, undervoltage and high current status registers are defined in Table 42. ADDRESS R16468 (4054h) DCDC UV Status R16469 (4055h) LDO ...
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WM8310 15.13 POWER MANAGEMENT INTERRUPTS Undervoltage monitoring is provided on all DC-DC Converters and LDO Regulators, as described in Section 15.11. The associated interrupt flags indicate an undervoltage condition in each individual DC-DC Converter or LDO Regulator. Each of these ...
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Pre-Production 15.14 POWER GOOD INDICATION The WM8310 can indicate the status of the DC-DC Converters and LDO Regulators via a GPIO pin configured as a “PWR_GOOD” output (see Section 21). Each DC-DC Converter and LDO Regulator to be monitored in ...
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WM8310 ADDRESS Table 44 PWR_GOOD (GPIO) Configuration 15.15 DC-DC CONVERTER OPERATION 15.15.1 OVERVIEW The WM8310 provides four DC-DC switching converters. Three of these are Buck (Step-down) converters; the fourth of these is a Boost (Step-up) converter. The principal characteristics of ...
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Pre-Production The DC-DC Converter design achieves high performance with a small inductor component. This is highly advantageous in size-critical designs for portable applications. In the case of DC-DC1 and DC- DC2, the switching frequency is selectable (2MHz or 4MHz). The ...
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WM8310 A minimum inductor charge time is applied in DCM mode; this leads to a minimum average inductor current when operating as described above. Under very light load conditions, pulse skipping is used to reduce the average inductor current to ...
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Pre-Production LDO mode is suitable for light loads, and provides a ripple-free output. The LDO mode features a very low start-up current; this mode can be used to avoid the higher in-rush current that occurs in the switching converter modes. ...
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WM8310 See Section 30.3 for details of specific recommended external components. 15.15.3 DC-DC STEP UP CONVERTER DC-DC Converter step-up DC-DC Converter designed to deliver high power efficiency across full load conditions designed to provide a ...
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Pre-Production 15.16 LDO REGULATOR OPERATION 15.16.1 OVERVIEW The WM8310 provides 11 LDO Regulators. Four of these are low-noise analogue LDOs. One of the LDO Regulators (LDO11) can be configured to be enabled even when the WM8310 is in the OFF ...
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WM8310 16 CURRENT SINKS 16.1 GENERAL DESCRIPTION The WM8310 provides two Current Sinks, ISINK1 and ISINK2. These are programmable constant- current sinks designed to drive strings of serially connected LEDs, including white LEDs used in display backlight applications. The WM8310 ...
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Pre-Production When the Current Sinks output drive is enabled or disabled using CS1_DRIVE or CS2_DRIVE, the current ramps up or down at a programmable rate. The ramp durations are programmed using the register bits defined in Section 16.2.3. If the ...
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WM8310 ADDRESS R16462 (404Eh) Current Sink 1 R16463 (404Fh) Current Sink 2 Table 49 Controlling the Sink Current for ISINK1 and ISINK2 16.2.3 When the Current Sinks output drive is enabled or disabled using CS1_DRIVE or CS2_DRIVE, the current ramps ...
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Pre-Production ADDRESS Current Sink 2 Table 50 Configuring On/Off Ramp Timing for ISINK1 and ISINK2 16.3 CURRENT SINK INTERRUPTS The Current Sinks are associated with two Interrupt event flags, which indicate if the Current Sinks are unable to sink the ...
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WM8310 16.4 LED DRIVER CONNECTIONS The recommended connections for LEDs on ISINK1 and ISINK2 are illustrated in Figure 23. Figure 23 LED Connections to ISINK1 and ISINK2 The ground connection associated with these two Current Sinks is the ISINKGND pin. ...
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Pre-Production 17 POWER SUPPLY CONTROL 17.1 GENERAL DESCRIPTION The WM8310 can take its power supply from a Wall adaptor, a USB interface or from a single-cell lithium battery. The WM8310 autonomously chooses the most appropriate power source available, and supports ...
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WM8310 Note that connecting the BATTVDD pin directly to a load is not recommended; this may lead to incorrect behaviour of the battery charger. The Wall Adaptor supply connects to SYSVDD via a FET switch as illustrated in Figure 24. ...
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Pre-Production ADDRESS R16397 (400Dh) System Status Table 52 Power Source Status Registers 17.2 BATTERY POWERED OPERATION The WM8310 selects Battery power via BATTVDD when the battery voltage is higher than the WALLVDD and USBVDD supply voltages. In practical usage, this ...
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WM8310 17.4 USB POWERED OPERATION The WM8310 selects USB power via the USBVDD pin when this supply is within the normal USB operating limits of 4.3V to 5.5V, and WALLVDD is less than 4.3V and USBVDD is the highest supply ...
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Pre-Production ADDRESS Table 55 Configuring the USB Power Operation 17.5 POWER PATH MANAGEMENT INTERRUPTS The Power Path Management circuit is associated with three Interrupt event flags. The PPM_SYSLO_EINT interrupt bit is set when the internal signal SYSLO indicates a SYSVDD ...
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WM8310 17.6 BACKUP POWER As an option, a backup power source can be provided for the WM8310. This can either be a rechargeable battery (coin cell or super/gold-capacitor) on the BACKUPVDD pin or else a standard capacitor on the LDO12VOUT ...
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Pre-Production Table 57 Backup Battery Charger Control 17.7 BATTERY CHARGER 17.7.1 The WM8310 incorporates a battery charger which is designed for charging single-cell lithium batteries. The battery charger can operate from either the Wall or USB power sources. The battery ...
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WM8310 Figure 25 Typical Connections for WM8310 Battery Charger The main battery terminal is connected to BATTVDD. The WM8310 also incorporates a battery temperature monitoring circuit, which monitors the NTC thermistor that is typically incorporated within a rechargeable battery pack. ...
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Pre-Production it is providing power to the system. The charger resumes operation automatically as soon as sufficient current capacity is available from the main power source. After the battery has been fully charged and the charge process has terminated, battery ...
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WM8310 ADDRESS R16456 (4048h) Charger Control 1 R16457 (4049h) Charger Control 2 R16458 (404Ah) Charger Status Table 58 Battery Charger Control The Battery Charger is associated with a number of Interrupt flags. Whenever the Battery Charger state changes, the CHG_MODE_EINT ...
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Pre-Production Fast charging is enabled by setting the CHG_FAST register bit, provided that the conditions for fast charging are satisfied. The fast charge current limit is selected using the CHG_FAST_ILIM field. The battery charge current is automatically controlled ...
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WM8310 provided also that the battery voltage has reached the target voltage CHG_VSEL at the end of the constant voltage charge phase. If the battery charger current is reduced or paused due to a drop in SYSVDD voltage (as described ...
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Pre-Production ADDRESS R16458 (404Ah) Charger Status Table 60 Battery Charger Termination The Battery Charger is associated with a number of Interrupt flags, as described in Section 17.7.8. If battery charging is terminated due to the End of Charge current threshold ...
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WM8310 Note that the integrated Auxiliary ADC can be used to perform this measurement if required. In this case, the digitised AUXADC measurement (AUX_DATA) represents the battery charge current in accordance with the following equation. See Section 18 for further ...
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Pre-Production The temperature monitoring circuit can be disabled by shorting NTCMON to LDO12VOUT. This is only recommended if there is no NTC thermistor incorporated in the battery pack or if battery temperature monitoring is provided by other methods. Note that ...
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WM8310 17.7.8 The Battery Charger is associated with a number of Interrupt event flags, described in Table 64. Each of these secondary interrupts triggers a primary Battery Charger Interrupt, CHG_INT (see Section 23). This can be masked by setting the ...
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Pre-Production ADDRESS Table 64 Battery Charger Interrupts 17.7.9 The status of the Battery Charger can be read from various registers and interrupts noted in the above sections. The Battery Charger status can also be read from the CHG_STATE register field, ...
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WM8310 18 AUXILIARY ADC 18.1 GENERAL DESCRIPTION The WM8310 incorporates a 12-bit Auxiliary ADC (AUXADC). This can be used to perform a number of system measurements (including supply voltages and battery temperature) and can also be used to measure analogue ...
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Pre-Production ADDRESS R16431 (402Fh) AuxADC Source Table 66 AUXADC Control w BIT LABEL DEFAULT 5:0 AUX_RATE [5:0] 00_0000 10 AUX_BKUP_BAT 0 T_SEL 9 AUX_WALL_SEL 0 AUX_BATT_SEL AUX_USB_SEL 0 6 AUX_SYSVDD_S AUX_BATT_TEM 0 P_SEL 4 ...
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WM8310 18.3 AUXADC READBACK Measured data from the AUXADC is read via the AuxADC Data Register (R16429), which contains two fields. The AUXADC Data Source is indicated in the AUX_DATA_SRC field; the associated measurement data is contained in the AUX_DATA ...
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Pre-Production 18.4 DIGITAL COMPARATORS The WM8310 has four digital comparators which may be used to compare AUXADC measurement data against programmable threshold values. Each comparator has a status bit, and also an associated interrupt flag (described in Section 18.5), which ...
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WM8310 ADDRESS R16434 (4032h) Comparator 2 R16435 (4033h) Comparator 3 R16436 (4034h) Comparator 4 w BIT LABEL DEFAULT 12 DCMP1_GT 0 11:0 DCMP1_THR 000h 15:13 DCMP2_SRC 000 [2:0] 12 DCMP2_GT 0 11:0 DCMP2_THR 000h 15:13 DCMP3_SRC 000 [2:0] DCMP3_GT 12 ...
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Pre-Production ADDRESS Table 68 AUXADC Digital Comparator Control 18.5 AUXADC INTERRUPTS The AUXADC is associated with a number of Interrupt event flags to indicate when new AUXADC data is ready indicate that one or more of the digital ...
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WM8310 19 RESERVED w Pre-Production PP, December 2009, Rev 3.0 124 ...
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Pre-Production 20 REAL-TIME CLOCK (RTC) 20.1 GENERAL DESCRIPTION The WM8310 provides a Real Time Clock (RTC) in the form of a 32-bit counter. The RTC uses the 32.768kHz crystal oscillator as its clock source and increments the register value once ...
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WM8310 ADDRESS R16416 (4020h) RTC Write Counter R16417 (4021h) RTC Time 1 R16418 (4022h) RTC Time 2 R16419 (4023h) RTC Alarm 1 R16420 (4024h) RTC Alarm 2 R16421 (4025h) RTC Control R16422 (4026h) RTC Trim Table 70 Real Time Clock ...
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Pre-Production 20.3 RTC INTERRUPTS The Real Time Clock (RTC) is associated with two Interrupt event flags. The RTC_PER_EINT interrupt is set each time a periodic timeout occurs. The periodic timeout is configured using the RTC_PINT_FREQ field described in Table 72. ...
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WM8310 20.4 DIGITAL RIGHTS MANAGEMENT The Real Time Clock (RTC) maintains a continuous record of the time; this is maintained at all times, including when the WM8310 is powered down and the RTC function is maintained by the backup battery. ...
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Pre-Production 21 GENERAL PURPOSE INPUTS / OUTPUTS (GPIO) 21.1 GENERAL DESCRIPTION The WM8310 has 12 general-purpose input/output (GPIO) pins, GPIO1 - GPIO12. These can be configured as inputs or outputs, active high or active low, with optional on-chip pull-up or ...
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WM8310 GPn_FN Table 73 List of GPIO Input Functions Further details of the GPIO input de-bounce time are noted in Section 21.3. GPn_FN GPIO ...
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Pre-Production GPn_FN Table 74 List of GPIO Output Functions 21.3 CONFIGURING GPIO PINS The GPIO pins are configured using the Resister fields defined in Table 75. The function of each GPIO is selected using the GPn_FN ...
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WM8310 ADDRESS R16440 (4038h) to R16451 (4043h) Note number between 1 and 12 that identifies the individual GPIO. Table 75 GPIO Pin Configuration When the GPIO output function is selected (GPn_FN = 0h, GPn_DIR = 0), the ...
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Pre-Production ADDRESS Table 76 GPIO Level Register The power domain for each GPIO is controlled using the GPn_PWR_DOM registers as described in Table 77. ADDRESS R16440 (4038h) GPIO1 Control R16441 (4039h) GPIO2 Control R16442 (403Ah) GPIO3 Control R16443 (403Bh) GPIO4 ...
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WM8310 The function of each GPIO is controlled using the GPn_FN registers defined in Table 78. Note that the selected function also depends on the associated GPn_DIR field described in Table 75. See also Section 21.2 for additional details of ...
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Pre-Production 21.4 GPIO INTERRUPTS Each GPIO pin has an associated interrupt flag, GPn_EINT, in Register R16405 (4015h). Each of these secondary interrupts triggers a primary GPIO Interrupt, GP_INT (see Section 23). This can be masked by setting the mask bit(s) ...
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WM8310 22 SYSTEM STATUS LED DRIVERS 22.1 GENERAL DESCRIPTION The WM8310 provides two System Status LED Drivers. These are digital outputs intended for driving LEDs directly. The LED outputs can be assigned to indicate OTP Program status, Power State status ...
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Pre-Production 22.2.2 Setting LEDn_SRC = 01 configures the associated LED to indicate Power State status. Under this selection, four different conditions may be indicated, as defined in Table 82. LED DRIVER LED1 or LED2 Table 82 Status LED Outputs - ...
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WM8310 ADDRESS R16460 (404Ch) Status LED1 R16461 (404Dh) Status LED2 Table 84 Status LED Manual Mode Control w BIT LABEL DEFAULT 9:8 LED1_MODE 00 [1:0] 5:4 LED1_SEQ_LE 10 N [1:0] LED1_DUR 3:2 01 [1:0] LED1_DUTY_C 1 [1:0] LED2_MODE ...
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Pre-Production 22.3 LED DRIVER CONNECTIONS The recommended connection for Status LEDs is illustrated in Figure 28. The LED outputs are referenced to the SYSVDD power domain. A series resistor may be required, depending on the LED characteristics and the SYSVDD ...
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WM8310 23 INTERRUPT CONTROLLER The WM8310 has a comprehensive Interrupt logic capability. The dedicated IRQ alert a host processor to selected events or fault conditions. Each of the interrupt conditions can be individually enabled or masked. Following an interrupt event, ...
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Pre-Production The interrupt logic is illustrated in Figure 29. Figure 29 Interrupt Logic Following the assertion of the IRQ determine which primary interrupt caused the event by reading the primary interrupt register R16400 (4010h). This register is defined in Section ...
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WM8310 ADDRESS R16408 (4018h) System Interrupts Mask w BIT LABEL 6 CS_INT 5 RTC_INT 4 OTP_INT 2 CHG_INT HC_INT 1 0 UV_INT 15 IM_PS_INT 14 IM_TEMP_INT 13 IM_GP_INT 12 IM_ON_PIN_INT 11 IM_WDOG_INT 8 IM_AUXADC_INT 7 IM_PPM_INT 6 IM_CS_INT IM_RTC_INT 5 ...
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Pre-Production ADDRESS Table 86 Primary Interrupt Status and Mask Bits 23.2 SECONDARY INTERRUPTS The following sections define the secondary interrupt status and control bits associated with each of the primary interrupt bits defined in Table 86. 23.2.1 The primary PS_INT ...
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WM8310 23.2.2 The primary TEMP_INT interrupt comprises a single secondary interrupt as described in Section 26. The secondary interrupt bit is defined in Table 88. The secondary interrupt can be masked. When the mask bit is set, the corresponding interrupt ...
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Pre-Production ADDRESS R16401 (4011h) Interrupt Status 1 R16409 (4019h) Interrupt Status 1 Mask Table 90 ON Pin Interrupt 23.2.5 The primary WDOG_INT interrupt comprises a single secondary interrupt as described in Section 25. The secondary interrupt bits are defined in ...
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WM8310 ADDRESS Note number between 1 and 4 that identifies the individual Comparator. Table 92 AUXADC Interrupts 23.2.9 The primary PPM_INT interrupt comprises three secondary interrupts as described in Section 17.5. The secondary interrupt bits are defined ...
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Pre-Production ADDRESS R16402 (4012h) Interrupt Status 2 R16410 (401Ah) Interrupt Status 2 Mask Table 94 Current Sink Interrupts 23.2.11 REAL TIME CLOCK INTERRUPTS The primary RTC_INT interrupt comprises two secondary interrupts as described in Section 20.3. The secondary interrupt bits ...
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WM8310 ADDRESS R16402 (4012h) Interrupt Status 2 R16410 (401Ah) Interrupt Status 2 Mask Table 96 OTP Memory Interrupts 23.2.13 RESERVED 23.2.14 BATTERY CHARGER INTERRUPTS The primary CHG_INT interrupt comprises six secondary interrupts as described in Section 17.7.8. The secondary interrupt ...
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Pre-Production ADDRESS R16410 (401Ah) Interrupt Status 2 Mask Table 97 Battery Charger Interrupts 23.2.15 HIGH CURRENT INTERRUPTS The primary HC_INT interrupt comprises two secondary interrupts as described in Section 15.13. The secondary interrupt bits are defined in Table 98. Each ...
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WM8310 ADDRESS R16404 (4014h) Interrupt Status 4 R16412 (401Ch) Interrupt Status 4 Mask Table 98 Overcurrent Interrupts 23.2.16 UNDERVOLTAGE INTERRUPTS The primary UV_INT interrupt comprises fourteen secondary interrupts as described in Section 15.13). The secondary interrupt bits are defined in ...
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Pre-Production 24 RESETS AND SUPPLY VOLTAGE MONITORING 24.1 RESETS The WM8310 provides hardware and software monitoring functions as inputs to a Reset management system. These functions enable the device to take appropriate action when power supplies are critically low or ...
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WM8310 A summary of the WM8310 Resets is contained in Table 100. RESET TYPE RESET CONDITION System Reset Power Sequence Failure Device overtemperature SYSVDD undervoltage (1) SYSVDD undervoltage (2) Software OFF request VPMIC (LDO12) undervoltage Device Reset Watchdog timeout Hardware ...
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Pre-Production The WM8310 asserts the RESET ¯ ¯ ¯ ¯ ¯ ¯ is held low for the duration of the shutdown sequence and is held low in the OFF state. In the RESET cases where Automatic Recovery is supported, RESET ...
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WM8310 The timing details of the Software Reset are illustrated in Figure 30. Power State RESET pin Figure 30 Software Reset Timing w Software Reset ON (shutdown / start-up) Time delay set by SWRST_DLY and OFF transition then ON transition ...
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Pre-Production 24.4 SUPPLY VOLTAGE MONITORING The WM8310 includes a number of mechanisms to prevent the system from starting up force it to shut down, when the power sources are critically low. The power supply configuration for the WM8310 ...
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WM8310 The WM8310 can also indicate the status of the SYSOK signal via a GPIO pin configured as a “SYSVDD Good” output (see Section 21). A GPIO pin configured as “SYSVDD Good” output will be asserted when the SYSVDD is ...
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Pre-Production 25 WATCHDOG TIMER The WM8310 includes a Watchdog Timer designed to detect a possible software fault condition where the host processor has locked up. The Watchdog Timer is a free-running counter driven by the internal RC oscillator. The Watchdog ...
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WM8310 ADDRESS Table 103 Controlling the Watchdog Timer The Watchdog timeout interrupt event is indicated by the WDOG_TO_EINT register field. This secondary interrupt triggers a primary Watchdog Interrupt, WDOG_INT (see Section 23). This can be masked by setting the mask ...
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Pre-Production 26 TEMPERATURE SENSING The WM8310 provides temperature monitoring as status information and also for self-protection of the device. Temperature monitoring is always enabled in the ON and SLEEP states. The thermal warning temperature can be set using the THW_TEMP ...
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WM8310 27 VOLTAGE AND CURRENT REFERENCES 27.1 VOLTAGE REFERENCE (VREF) The main voltage reference generated by the WM8310 is bonded to the VREFC pin. The accuracy of this reference is optimised by factory-set trim registers. The voltage reference (VREF) requires ...
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Pre-Production 28 REGISTER MAP OVERVIEW w WM8310 PP, December 2009, Rev 3.0 161 ...
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WM8310 w Pre-Production PP, December 2009, Rev 3.0 162 ...
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Pre-Production w WM8310 PP, December 2009, Rev 3.0 163 ...
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WM8310 w Pre-Production PP, December 2009, Rev 3.0 164 ...
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Pre-Production w WM8310 PP, December 2009, Rev 3.0 165 ...
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WM8310 w Pre-Production PP, December 2009, Rev 3.0 166 ...
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Pre-Production w WM8310 PP, December 2009, Rev 3.0 167 ...
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WM8310 29 REGISTER BITS BY ADDRESS REGISTER BIT LABEL ADDRESS R0 (00h) 15:0 CHIP_ID[15:0] Reset ID Register 00h Reset ID REGISTER BIT LABEL ADDRESS R1 (01h) 15:8 PARENT_REV[ Revision 7:0] 7:0 CHILD_REV[7: 0] Register 01h Revision REGISTER BIT LABEL ADDRESS ...
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Pre-Production REGISTER BIT LABEL ADDRESS R16386 3 THW_HYST (4002h) Thermal Monitoring 1:0 THW_TEMP[1: 0] Register 4002h Thermal Monitoring REGISTER BIT LABEL ADDRESS R16387 15 CHIP_ON (4003h) Power State 14 CHIP_SLP 12 REF_LP 11:10 PWRSTATE_D LY[1:0] 9 SWRST_DLY 5:4 USB100MA_S TARTUP[1:0] ...
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WM8310 REGISTER BIT LABEL ADDRESS Register 4003h Power State REGISTER BIT LABEL ADDRESS R16388 15 WDOG_ENA (4004h) Watchdog 14 WDOG_DEBU G 13 WDOG_RST_ SRC 12 WDOG_SLPE NA 11 WDOG_RESE T 9:8 WDOG_SECA CT[1:0] 5:4 WDOG_PRIMA CT[1:0] 2:0 WDOG_TO[2 ...
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Pre-Production REGISTER BIT LABEL ADDRESS Register 4004h Watchdog REGISTER BIT LABEL ADDRESS R16389 9:8 ON_PIN_SECA (4005h) ON CT[1:0] Pin Control 5:4 ON_PIN_PRIM ACT[1:0] 3 ON_PIN_STS 1:0 ON_PIN_TO[1: 0] Register 4005h ON Pin Control REGISTER BIT LABEL ADDRESS R16390 15 RECONFIG_A ...
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WM8310 REGISTER BIT LABEL ADDRESS 6 AUXRST_SLP ENA 5 RST_SLP_MS K 4 RST_SLPENA 1:0 RST_DUR[1:0] Register 4006h Reset Control REGISTER BIT LABEL ADDRESS R16391 2 AUTOINC (4007h) Control Interface Register 4007h Control Interface REGISTER BIT LABEL ADDRESS R16392 15:0 SECURITY[15: ...
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Pre-Production REGISTER BIT LABEL ADDRESS R16394 15 OTP_PROG (400Ah) OTP Control 13 OTP_MEM 11 OTP_FINAL 10 OTP_VERIFY 9 OTP_WRITE 8 OTP_READ 7:6 OTP_READ_L VL[1:0] 5 OTP_BULK 1:0 OTP_PAGE[ DEFAULT DESCRIPTION 0 Selects the PROGRAM device state ...
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WM8310 REGISTER BIT LABEL ADDRESS Register 400Ah OTP Control REGISTER BIT LABEL ADDRESS R16396 11 GP12_LVL (400Ch) GPIO Level 10 GP11_LVL 9 GP10_LVL 8 GP9_LVL 7 GP8_LVL 6 GP7_LVL 5 GP6_LVL 4 GP5_LVL w DEFAULT DESCRIPTION 11 = Reserved DEFAULT ...
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Pre-Production REGISTER BIT LABEL ADDRESS 3 GP4_LVL 2 GP3_LVL 1 GP2_LVL 0 GP1_LVL Register 400Ch GPIO Level REGISTER BIT LABEL ADDRESS R16397 15 THW_STS (400Dh) System Status 10 PWR_SRC_BA TT 9 PWR_WALL 8 PWR_USB 4:0 MAIN_STATE[ 4:0] w DEFAULT DESCRIPTION ...
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WM8310 REGISTER BIT LABEL ADDRESS Register 400Dh System Status REGISTER BIT LABEL ADDRESS R16398 15 ON_TRANS (400Eh) ON Source 11 ON_GPIO 10 ON_SYSLO 8 ON_CHG 7 ON_WDOG_T w DEFAULT DESCRIPTION 0_0011 = READ_OTP 0_0100 = READ_DBE 0_0101 = DBE_DN 0_0110 ...
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Pre-Production REGISTER BIT LABEL ADDRESS O 6 ON_SW_REQ 5 ON_RTC_ALM 4 ON_ON_PIN 3 RESET_CNV_ UV 2 RESET_SW 1 RESET_HW 0 RESET_WDO G Register 400Eh ON Source REGISTER BIT LABEL ADDRESS R16399 13 OFF_INTLDO_ (400Fh) ERR OFF Source 12 OFF_PWR_SE Q ...
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WM8310 REGISTER BIT LABEL ADDRESS 9 OFF_THERR 6 OFF_SW_REQ 4 OFF_ON_PIN Register 400Fh OFF Source REGISTER BIT LABEL ADDRESS R16400 15 PS_INT (4010h) System Interrupts 14 TEMP_INT 13 GP_INT 12 ON_PIN_INT 11 WDOG_INT 8 AUXADC_INT 7 PPM_INT 6 CS_INT 5 ...
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Pre-Production REGISTER BIT LABEL ADDRESS 0 UV_INT Register 4010h System Interrupts REGISTER BIT LABEL ADDRESS R16401 15 PPM_SYSLO_ (4011h) EINT Interrupt Status 1 14 PPM_PWR_S RC_EINT 13 PPM_USB_CU RR_EINT 12 ON_PIN_CINT 11 WDOG_TO_EI NT 8 AUXADC_DAT A_EINT 7 AUXADC_DCO MP4_EINT ...
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WM8310 REGISTER BIT LABEL ADDRESS R16402 15 CHG_BATT_H (4012h) OT_EINT Interrupt Status 2 14 CHG_BATT_C OLD_EINT 13 CHG_BATT_F AIL_EINT 12 CHG_OV_EIN T 11 CHG_END_EI NT 10 CHG_TO_EINT 9 CHG_MODE_E INT 8 CHG_START_ EINT 7 CS2_EINT 6 CS1_EINT 5 OTP_CMD_EN D_EINT ...
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Pre-Production REGISTER BIT LABEL ADDRESS R16403 9 UV_LDO10_EI (4013h) NT Interrupt Status 3 8 UV_LDO9_EIN T 7 UV_LDO8_EIN T 6 UV_LDO7_EIN T 5 UV_LDO6_EIN T 4 UV_LDO5_EIN T 3 UV_LDO4_EIN T 2 UV_LDO3_EIN T 1 UV_LDO2_EIN T 0 UV_LDO1_EIN T ...
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WM8310 REGISTER BIT LABEL ADDRESS R16405 11 GP12_EINT (4015h) Interrupt Status 5 10 GP11_EINT 9 GP10_EINT 8 GP9_EINT 7 GP8_EINT 6 GP7_EINT 5 GP6_EINT 4 GP5_EINT 3 GP4_EINT 2 GP3_EINT 1 GP2_EINT 0 GP1_EINT Register 4015h Interrupt Status 5 REGISTER ...
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Pre-Production REGISTER BIT LABEL ADDRESS R16408 15 IM_PS_INT (4018h) System Interrupts Mask 14 IM_TEMP_INT 13 IM_GP_INT 12 IM_ON_PIN_IN T 11 IM_WDOG_IN T 8 IM_AUXADC_I NT 7 IM_PPM_INT 6 IM_CS_INT 5 IM_RTC_INT 4 IM_OTP_INT 2 IM_CHG_INT 1 IM_HC_INT 0 IM_UV_INT Register ...
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WM8310 REGISTER BIT LABEL ADDRESS R16409 15 IM_PPM_SYSL (4019h) O_EINT Interrupt Status 1 Mask 14 IM_PPM_PWR _SRC_EINT 13 IM_PPM_USB_ CURR_EINT 12 IM_ON_PIN_CI NT 11 IM_WDOG_TO _EINT 8 IM_AUXADC_ DATA_EINT 7 IM_AUXADC_ DCOMP4_EIN T 6 IM_AUXADC_ DCOMP3_EIN T 5 IM_AUXADC_ DCOMP2_EIN ...
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Pre-Production REGISTER BIT LABEL ADDRESS R16410 15 IM_CHG_BATT (401Ah) _HOT_EINT Interrupt Status 2 Mask 14 IM_CHG_BATT _COLD_EINT 13 IM_CHG_BATT _FAIL_EINT 12 IM_CHG_OV_ EINT 11 IM_CHG_END _EINT 10 IM_CHG_TO_ EINT 9 IM_CHG_MOD E_EINT 8 IM_CHG_STA RT_EINT 7 IM_CS2_EINT 6 IM_CS1_EINT 5 ...
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WM8310 REGISTER BIT LABEL ADDRESS _OFF_EINT 0 IM_PS_ON_W AKE_EINT Register 401Ah Interrupt Status 2 Mask REGISTER BIT LABEL ADDRESS R16411 9 IM_UV_LDO10 (401Bh) _EINT Interrupt Status 3 Mask 8 IM_UV_LDO9_ EINT 7 IM_UV_LDO8_ EINT 6 IM_UV_LDO7_ EINT 5 IM_UV_LDO6_ EINT ...
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Pre-Production REGISTER BIT LABEL ADDRESS R16412 9 IM_HC_DC2_E (401Ch) INT Interrupt Status 4 Mask 8 IM_HC_DC1_E INT 3 IM_UV_DC4_E INT 2 IM_UV_DC3_E INT 1 IM_UV_DC2_E INT 0 IM_UV_DC1_E INT Register 401Ch Interrupt Status 4 Mask REGISTER BIT LABEL ADDRESS R16413 ...
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WM8310 REGISTER BIT LABEL ADDRESS 5 IM_GP6_EINT 4 IM_GP5_EINT 3 IM_GP4_EINT 2 IM_GP3_EINT 1 IM_GP2_EINT 0 IM_GP1_EINT Register 401Dh Interrupt Status 5 Mask REGISTER BIT LABEL ADDRESS R16416 15:0 RTC_WR_CNT (4020h) [15:0] RTC Write Counter Register 4020h RTC Write Counter ...
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Pre-Production REGISTER BIT LABEL ADDRESS R16419 15:0 RTC_ALM[15:0 (4023h) ] RTC Alarm 1 Register 4023h RTC Alarm 1 REGISTER BIT LABEL ADDRESS R16420 15:0 RTC_ALM[15:0 (4024h) ] RTC Alarm 2 Register 4024h RTC Alarm 2 REGISTER BIT LABEL ADDRESS R16421 ...
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WM8310 REGISTER BIT LABEL ADDRESS R16429 15:12 AUX_DATA_S (402Dh) RC[3:0] AuxADC Data 11:0 AUX_DATA[11: 0] Register 402Dh AuxADC Data REGISTER BIT LABEL ADDRESS R16430 15 AUX_ENA (402Eh) AuxADC Control 14 AUX_CVT_EN A 12 AUX_SLPENA 5:0 AUX_RATE[5 DEFAULT DESCRIPTION ...
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Pre-Production REGISTER BIT LABEL ADDRESS Register 402Eh AuxADC Control REGISTER BIT LABEL ADDRESS R16431 10 AUX_BKUP_B (402Fh) ATT_SEL AuxADC Source 9 AUX_WALL_S EL 8 AUX_BATT_S EL 7 AUX_USB_SE L 6 AUX_SYSVDD _SEL 5 AUX_BATT_TE MP_SEL 4 AUX_CHIP_TE MP_SEL 3 AUX_AUX4_S ...
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WM8310 REGISTER BIT LABEL ADDRESS 9 DCOMP2_STS 8 DCOMP1_STS 3 DCMP4_ENA 2 DCMP3_ENA 1 DCMP2_ENA 0 DCMP1_ENA Register 4030h Comparator Control REGISTER BIT LABEL ADDRESS R16433 15:13 DCMP1_SRC[2 (4031h) :0] Comparator 1 12 DCMP1_GT 11:0 DCMP1_THR[1 1:0] Register 4031h Comparator ...
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Pre-Production REGISTER BIT LABEL ADDRESS 12 DCMP2_GT 11:0 DCMP2_THR[1 1:0] Register 4032h Comparator 2 REGISTER BIT LABEL ADDRESS R16435 15:13 DCMP3_SRC[2 (4033h) :0] Comparator 3 12 DCMP3_GT 11:0 DCMP3_THR[1 1:0] Register 4033h Comparator 3 REGISTER BIT LABEL ADDRESS R16436 15:13 ...
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WM8310 REGISTER BIT LABEL ADDRESS R16440 15 GP1_DIR (4038h) GPIO1 Control 14:13 GP1_PULL[1:0] 12 GP1_INT_MO DE 11 GP1_PWR_DO M 10 GP1_POL 9 GP1_OD 7 GP1_ENA 3:0 GP1_FN[3:0] w DEFAULT DESCRIPTION 1 GPIO1 pin direction 0 = Output 1 = Input ...
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Pre-Production REGISTER BIT LABEL ADDRESS Register 4038h GPIO1 Control REGISTER BIT LABEL ADDRESS R16441 15 GP2_DIR (4039h) GPIO2 Control 14:13 GP2_PULL[1:0] 12 GP2_INT_MO DE 11 GP2_PWR_DO M 10 GP2_POL 9 GP2_OD 7 GP2_ENA 3:0 GP2_FN[3:0] w DEFAULT DESCRIPTION 9 = ...
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WM8310 REGISTER BIT LABEL ADDRESS Register 4039h GPIO2 Control REGISTER BIT LABEL ADDRESS R16442 15 GP3_DIR (403Ah) GPIO3 Control 14:13 GP3_PULL[1:0] 12 GP3_INT_MO DE 11 GP3_PWR_DO M 10 GP3_POL 9 GP3_OD 7 GP3_ENA 3:0 GP3_FN[3:0] w DEFAULT DESCRIPTION 15 = ...
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Pre-Production REGISTER BIT LABEL ADDRESS Register 403Ah GPIO3 Control REGISTER BIT LABEL ADDRESS R16443 15 GP4_DIR (403Bh) GPIO4 Control 14:13 GP4_PULL[1:0] 12 GP4_INT_MO DE 11 GP4_PWR_DO M 10 GP4_POL w DEFAULT DESCRIPTION 2 = Power On/Off request 3 = Sleep/Wake ...
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WM8310 REGISTER BIT LABEL ADDRESS 9 GP4_OD 7 GP4_ENA 3:0 GP4_FN[3:0] Register 403Bh GPIO4 Control w DEFAULT DESCRIPTION 0 = Inverted (active low Non-Inverted (active high) 0 GPIO4 Output pin configuration 0 = CMOS 1 = Open Drain ...
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Pre-Production REGISTER BIT LABEL ADDRESS R16444 15 GP5_DIR (403Ch) GPIO5 Control 14:13 GP5_PULL[1:0] 12 GP5_INT_MO DE 11 GP5_PWR_DO M 10 GP5_POL 9 GP5_OD 7 GP5_ENA 3:0 GP5_FN[3:0] w DEFAULT DESCRIPTION 1 GPIO5 pin direction 0 = Output 1 = Input ...
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WM8310 REGISTER BIT LABEL ADDRESS Register 403Ch GPIO5 Control REGISTER BIT LABEL ADDRESS R16445 15 GP6_DIR (403Dh) GPIO6 Control 14:13 GP6_PULL[1:0] 12 GP6_INT_MO DE 11 GP6_PWR_DO M 10 GP6_POL 9 GP6_OD 7 GP6_ENA 3:0 GP6_FN[3:0] w DEFAULT DESCRIPTION 9 = ...