WM8310GEB/V Wolfson Microelectronics, WM8310GEB/V Datasheet - Page 56

• Manufacturer Part Number: WM8310GEB/V
• Description: POWER MANAGEMENT SUBSYSTEM, 169BGA
• Manufacturer: Wolfson Microelectronics

Specifications of WM8310GEB/V

• Supply Voltage: 7V
• No. Of Step-down Dc - Dc Converters: 4
• No. Of Ldo Regulators: 11
• Digital Ic Case Style: BGA
• No. Of Pins: 169
• No. Of Regulated Outputs: 13
• Operating Temperature Range: -40°C To
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

WM8310
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The OTP and DBE Memory commands are each described in the following sections. Note that, in
some cases, commands may be executed on a single page of memory or may be executed as a
Bulk operation on all available memory pages.
Completion of each OTP or DBE Memory command is indicated via an Interrupt flag, as described in
Section 14.5. The pass/fail outcome of any Verify OTP command is also indicated by the Interrupt
bits. Note that read/write access to the WM8310 Register Map is not supported while a DBE/OTP
command is in progress. It is recommended that the IRQ
Interrupt event; the host processor should read the OTP/DBE Interrupt event flags to confirm the
OTP/DBE command status following the assertion of the IRQ
The programming supply voltage PROGVDD is required for the OTP Write commands and the OTP
Finalise command. It is also necessary to overdrive the LDO12VOUT pin from an external supply.
See Section 6 for details of the required supply voltages.
14.4.1
The DBE and OTP commands are only supported when the WM8310 is in the PROGRAM state. The
WM8310 can only enter the PROGRAM state as a transition from the OFF state. This is commanded
by setting the OTP_PROG register bit.
Important note - when the PROGRAM state is selected, the WM8310 will read all pages of the OTP
memory into the corresponding pages of the DORW. This is required in order to confirm if the OTP
contents have already been finalised (see Section 14.4.5). The previous contents of the DORW
registers will be lost when the PROGRAM state is entered.
The transition into the PROGRAM state can be confirmed by reading the MAIN_STATE register field
as defined in Section 11.2. When the MAIN_STATE register reads back a value of 01011, then the
WM8310 is in the PROGRAM state.
In the PROGRAM state, the DBE and OTP commands are initiated by further writes to the OTP
Control Register (R16394), as described in the following sections.
To exit the PROGRAM state and resume normal operations, a Device Reset must be scheduled.
14.4.2
The Read command loads either one or all data pages from the DBE or OTP into the corresponding
page(s) of the DORW. The Read commands are selected by writing 1 to the OTP_READ bit.
To read the OTP, the OTP_MEM bit should be set to 1. To read the DBE, the OTP_MEM bit should
be set to 0.
The Read Margin Level is selected by setting the OTP_READ_LVL. Note that this register relates to
the OTP only; it has no effect on DBE Read commands. The recommended setting for the OTP
Read command is ‘Normal’ level. The OTP_READ_LVL field should be set to 00b.
To read a single memory page, the applicable page is selected by setting the OTP_PAGE field. To
read all memory pages, the OTP_BULK bit should be set to 1.
Note that the OTP_PAGE field is defined differently for DBE pages and for OTP pages, as detailed in
Section 14.4.6.
All other bits in the OTP Control Register should be set to 0 when a Read command is issued. (Note
that OTP_PROG should be set to 0 when a Read command is issued.)
For typical applications, the Bulk Read commands are recommended. The OTP Control Register
contents for the OTP / DBE Bulk Read Commands are detailed in Table 23.
Table 23 OTP / DBE Read Command
DBE Read All
OTP Read All
READ COMMAND
ENTERING / EXITING THE PROGRAM STATE
OTP / DBE READ COMMAND
OTP CONTROL REGISTER VALUE
¯ ¯ ¯ pin is configured to indicate any DBE/OTP
0120h
2120h
¯ ¯ ¯ pin.
PP, December 2009, Rev 3.0
Pre-Production
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