WM8310GEB/V Wolfson Microelectronics, WM8310GEB/V Datasheet - Page 146

• Manufacturer Part Number: WM8310GEB/V
• Description: POWER MANAGEMENT SUBSYSTEM, 169BGA
• Manufacturer: Wolfson Microelectronics

Specifications of WM8310GEB/V

• Supply Voltage: 7V
• No. Of Step-down Dc - Dc Converters: 4
• No. Of Ldo Regulators: 11
• Digital Ic Case Style: BGA
• No. Of Pins: 169
• No. Of Regulated Outputs: 13
• Operating Temperature Range: -40°C To
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

WM8310
w
Note: n is a number between 1 and 4 that identifies the individual Comparator.
Table 92 AUXADC Interrupts
23.2.9
The primary PPM_INT interrupt comprises three secondary interrupts as described in Section 17.5.
The secondary interrupt bits are defined in Table 93.
Each of the secondary interrupts can be masked. When a mask bit is set, the corresponding interrupt
event is masked and does not trigger a PPM_INT interrupt. The secondary interrupt bits in R16401
(4011h) are valid regardless of whether the mask bit is set. The secondary interrupts are all masked
by default.
R16401
(4011h)
Interrupt Status
1
R16409
(4019h)
Interrupt Status
1 Mask
Table 93 Power Path Management Interrupts
23.2.10 CURRENT SINK INTERRUPTS
The primary CS_INT interrupt comprises two secondary interrupts as described in Section 16.3. The
secondary interrupt bits are defined in Table 94.
Each of the secondary interrupts can be masked. When a mask bit is set, the corresponding interrupt
event is masked and does not trigger a CS_INT interrupt. The secondary interrupt bits in R16402
(4012h) are valid regardless of whether the mask bit is set. The secondary interrupts are all masked
by default.
ADDRESS
ADDRESS
POWER PATH MANAGEMENT INTERRUPTS
BIT
BIT
7:4
15
14
13
15
14
13
IM_AUXADC_DCOMPn_EI
NT
PPM_SYSLO_EINT
PPM_PWR_SRC_EINT
PPM_USB_CURR_EINT
IM_PPM_SYSLO_EINT
IM_PPM_PWR_SRC_EINT
IM_PPM_USB_CURR_EIN
T
LABEL
LABEL
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Power Path SYSLO interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
Power Path Source interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
Power Path USB Current interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
PP, December 2009, Rev 3.0
DESCRIPTION
DESCRIPTION
Pre-Production
146