WM8310GEB/V Wolfson Microelectronics, WM8310GEB/V Datasheet - Page 52

• Manufacturer Part Number: WM8310GEB/V
• Description: POWER MANAGEMENT SUBSYSTEM, 169BGA
• Manufacturer: Wolfson Microelectronics

Specifications of WM8310GEB/V

• Supply Voltage: 7V
• No. Of Step-down Dc - Dc Converters: 4
• No. Of Ldo Regulators: 11
• Digital Ic Case Style: BGA
• No. Of Pins: 169
• No. Of Regulated Outputs: 13
• Operating Temperature Range: -40°C To
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

WM8310
14 BOOTSTRAPPING AND OTP MEMORY CONTROL
14.1 GENERAL DESCRIPTION
14.2 DBE AND OTP MEMORY DEFINITION
w
The WM8310 is a highly configurable device which can be tailored specifically to the requirements of
a complex system application. The sequencing and voltage control of the integrated DC-DC
Converters and LDOs in power-up, shut-down and SLEEP conditions is crucial to the robust
operation of the application.
In development, the WM8310 allows designers to modify or experiment with different settings of the
control sequences by writing to the applicable registers in the OFF state prior to commanding an ‘ON’
state transition. Configuration settings can also be stored on an external EEPROM and loaded onto
the WM8310 as required.
For production use, the WM8310 provides an on-chip a One-Time Programmable (OTP) memory, in
which the essential parameters for starting up the device can be programmed. This allows the
WM8310 to start up and shut down the system with no dependency on any other devices for
application-specific configuration parameters.
An illustration of the WM8310 memory locations is shown in Figure 18. The main Register Map of the
WM8310 contains a block of data in a ‘Window’ area which is mirrored in the OTP and/or the DBE
Memory. Data from the external DBE Memory can be loaded into the Window area. Data can be
transferred from the Window into OTP Memory and also from the OTP Memory into the Window. The
Window is called the DBE/OTP Register Window (DORW); the data in this Window is mirrored in
other locations within the WM8310 Register Map.
Figure 18 DBE and OTP Memory Layout
PP, December 2009, Rev 3.0
Pre-Production
52