ispPAC-POWR6AT6-01N32I Lattice, ispPAC-POWR6AT6-01N32I Datasheet - Page 11

• Manufacturer Part Number: ispPAC-POWR6AT6-01N32I
• Description: Supervisory Circuits Prec. Prog. Pwr Sppl y Seq. Mon. Trim I
• Manufacturer: Lattice

Specifications of ispPAC-POWR6AT6-01N32I

• Number Of Voltages Monitored: 6
• Output Type: Open Collector / Drain
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Power-up Reset Delay (typ): 500 ms
• Supply Voltage (max): 3.96 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 10 mA
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Calculation
The algorithm to convert the ADC code to the corresponding voltage takes into consideration the attenuation bit
value. In other words, if the attenuation bit is set, then ADC output logic multiplies the 10-bit ADC code by 3 to cal-
culate the actual voltage at that VMON input. The following formula can always be used to calculate the actual volt-
age from the ADC code.
Voltage at the VMONx Pins
1
Controlling Power Supply Output Voltage with the Margin/ Trim Block
One of the key features of the ispPAC-POWR6AT6 is its ability to make adjustments to the power supplies that it
may also be monitoring. This is accomplished through the Trim and Margin Block of the device. The Trim and Mar-
gin Block can adjust voltages of up to six different power supplies through TrimCells as shown in Figure 3-7. The
DC-DC blocks in the figure represent virtually any type of DC power supply that has a trim or voltage adjustment
input. This can be an off-the-shelf unit or custom circuit designed around a switching regulator IC.
The interface between the ispPAC-POWR6AT6 and the DC power supply is represented by a single resistor (R1 to
R6) to simplify the diagram. Each of these resistors represents a resistor network.
Other control signals driving the Margin/Trim Block are:
Next to each DC-DC converter, four voltages are shown. These voltages correspond to the operating voltage profile
of the Margin/Trim Block.
When the VPS[1:0] = 00, representing Voltage Profile 0: (Voltage Profile 0 is recommended to be used for the nor-
mal circuit operation)
The output voltage of the DC-DC converter controlled by the Trim 1 pin of the ispPAC-POWR6AT6 will be 1V and
that TrimCell is operating in closed loop trim mode. At the same time, the DC-DC converters controlled by Trim 2,
Trim 3 and Trim 6 pins output 1.2V, 1.5V and 3.3V respectively.
When the VPS[1:0] = 01, representing Voltage Profile 1 being active:
The DC-DC output voltage controlled by Trim 1, 2, 3, and 6 pins will be 1.05V, 1.26V, 1.57V, and 3.46V. These sup-
ply voltages correspond to 5% above their respective normal operating voltage (also called as margin high).
Similarly, when VPS[1:0] = 11, all DC-DC converters are margined low by 5%.
Note: ADC_VALUE_HIGH (8 bits), ADC_VALUE_LOW (4 bits) read from I
VMONx = ADC code (12 bits
• VPS [1:0] – Control signals from device pins common to all six TrimCells, which are used to select the active
• ADC input – Used to determine the trimmed DC-DC converter voltage.
• CLTENb – Used to enable closed loop trimming of all TrimCells together.
voltage profile for all TrimCells together.
1
, converted to decimal) * 2mV
3-11
2
C/SMBUS interface
ispPAC-POWR6AT6 Data Sheet