FM3264-G Ramtron, FM3264-G Datasheet - Page 10

• Manufacturer Part Number: FM3264-G
• Description: Supervisory Circuits 64K w/Pwr Mon WDT Bat Sw Pwr Fail
• Manufacturer: Ramtron

Specifications of FM3264-G

• Number Of Voltages Monitored: 4
• Monitored Voltage: 2.6 V or 2.9 V or 3.9 V or 4.4 V
• Output Type: Active Low or Bidirectional
• Manual Reset: Resettable
• Watchdog: Watchdog
• Battery Backup Switching: Backup
• Power-up Reset Delay (typ): 200 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Supply Current (typ): 1500 uA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-14
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Rev. 3.1
July 2010
09h
WTR
POR
LB
WR3-0
00-08h
Reserved – DO NOT USE THIS ADDRESS SPACE
Watchdog Restart & Flags
Watchdog Timer Reset Flag: When the /RST signal is activated by the watchdog the WTR bit will be set to 1. It
must be cleared by the user. Note that both WTR and POR could be set if both reset sources have occurred since
the flags were cleared by the user. Battery-backed. Read/Write (internally set, user can clear bit).
Power-on Reset Flag: When the /RST pin is activated by V
cleared by the user. Note that both WTR and POR could be set if both reset sources have occurred since the flags
were cleared by the user. Battery-backed. Read/Write (internally set, user can clear bit).
Low Backup Flag: On power up, if the VBAK source is below the minimum voltage to operate the event counters,
this bit will be set to 1. The user should clear it to 0 when initializing the system. Battery-backed. Read/Write
(internally set, user can clear bit).
Watchdog Restart: Writing a pattern 1010b to WR3-0 restarts the watchdog timer. The upper nibble contents do
not affect this operation. Writing any pattern other than 1010b to WR3-0 has no effect on the timer. This allows
users to clear the WTR, POR, and LB flags without affecting the watchdog timer. Write-only.
WTR
D7
POR
D6
D5
LB
D4
-
DD
WR3
D3
< V
TP
, the POR bit will be set to 1. It must be
WR2
D2
WR1
D1
FM3204/16/64/256
Page 10 of 21
WR0
D0