STM32W108C8U63TR STMicroelectronics, STM32W108C8U63TR Datasheet - Page 10
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STM32W108C8U63TR
Manufacturer Part Number
STM32W108C8U63TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108C8U63TR.pdf
(207 pages)
Specifications of STM32W108C8U63TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Description
The STM32W108C8 is a fully integrated System-on-Chip that integrates a 2.4 GHz, IEEE
802.15.4-compliant transceiver, 32-bit ARM® Cortex™-M3 microprocessor, Flash and RAM
memory, and peripherals of use to designers of 802.15.4-based systems.
Figure 1.
The transceiver utilizes an efficient architecture that exceeds the dynamic range
requirements imposed by the IEEE 802.15.4-2003 standard by over 15 dB. The integrated
receive channel filtering allows for robust co-existence with other communication standards
in the 2.4 GHz spectrum, such as IEEE 802.11 and Bluetooth. The integrated regulator,
VCO, loop filter, and power amplifier keep the external component count low. An optional
high performance radio mode (boost mode) is software-selectable to boost dynamic range.
The integrated 32-bit ARM® Cortex™-M3 microprocessor is highly optimized for high
performance, low power consumption, and efficient memory utilization. Including an
integrated MPU, it supports two different modes of operation: Privileged mode and
Unprivileged mode. This architecture could be used to separate the networking stack from
the application code and prevent unwanted modification of restricted areas of memory and
registers resulting in increased stability and reliability of deployed solutions.
The STM32W108C8 has 64 Kbytes of embedded Flash memory and 8 Kbytes of integrated
RAM for data and program storage. The STM32W108C8 HAL software employs an effective
wear-leveling algorithm that optimizes the lifetime of the embedded Flash.
To maintain the strict timing requirements imposed by the IEEE 802.15.4-2003 standards,
the STM32W108C8 integrates a number of MAC functions into the hardware. The MAC
hardware handles automatic ACK transmission and reception, automatic backoff delay, and
clear channel assessment for transmission, as well as automatic filtering of received
packets. A packet trace interface is also integrated with the MAC, allowing complete, non-
intrusive capture of all packets to and from the STM32W108C8.
RF_TX_ALT_P,N
VREG_OUT
STM32W108C8 block diagram
nRESET
RF_P,N
BIAS_R
OSCA
OSCB
PA select
HF crystal
Regulator
LF crystal
PA
OSC
POR
OSC
Bias
LNA
PA
Doc ID 018587 Rev 1
Internal HF
Internal LF
RC-OSC
RC-OSC
SYNTH
IF
Calibration
Purpose
General
ADC
DAC
ADC
ADC
PA[7:0], PB[7:0], PC[7:0]
GPIO multiplexor swtich
Packet Trace
Baseband
Packet sniffer
purpose
registers
SPI/I
General
MAC
UART/
timers
TX_ACTIVE
GPIO
+
2
C
Always
Powered
Domain
ARM CORTEX-M3
CPU debug
TPIU/ITM/
CPU with NVIC
FPB/DWT
Watchdog
8 kBytes
manage r
SRAM
Data
and MPU
Chip
®
Wire and
64 kBytes
debug
Serial
JTAG
Sleep
timer
Program
controller
Encryption
acclerator
Flash
2
Interrupt
nd
level
STM32W108C8
SWCLK,
JTCK
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