STM32W108C8U63TR STMicroelectronics, STM32W108C8U63TR Datasheet - Page 23
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STM32W108C8U63TR
Manufacturer Part Number
STM32W108C8U63TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108C8U63TR.pdf
(207 pages)
Specifications of STM32W108C8U63TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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STM32W108C8
Table 2.
Pin no.
35
36
37
38
39
PC4
JTMS
SWDIO
PB0
VREF
VREF
IRQA
TRACECLK
(see also Pin 25)
TIM1CLK
TIM2MSK
VDD_PADS
PC1
ADC3
SWO
(see also Pin 33)
TRACEDATA0
VDD_MEM
Pin descriptions (continued)
Signal
Direction
Analog O
Analog I
Analog
Power
Power
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
Digital I/O
Enable with GPIO_DBGCFG[5]
JTAG mode select from debugger
Selected when in JTAG mode (default mode)
JTAG mode is enabled after power-up or by forcing NRST low
Select Serial Wire mode using the ARM-defined protocol through a
debugger
Internal pull-up is enabled
Serial Wire bidirectional data to/from debugger
Enable Serial Wire mode (see JTMS description)
Select Serial Wire mode using the ARM-defined protocol through a
debugger
Internal pull-up is enabled
Digital I/O
ADC reference output.
Enable analog function with GPIO_PBCFGL[3:0].
ADC reference input.
Enable analog function with GPIO_PBCFGL[3:0].
Enable reference output with an ST system function.
External interrupt source A.
Synchronous CPU trace clock.
Enable trace interface in ARM core.
Select alternate output function with GPIO_PBCFGL[3:0].
Timer 1 external clock input.
Timer 2 external clock mask input.
Pads supply (2.1 to 3.6 V).
Digital I/O
ADC Input 3
Enable analog function with GPIO_PCCFGL[7:4]
Serial Wire Output asynchronous trace output to debugger
Select asynchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[7:4]
Synchronous CPU trace data bit 0
Select 1-, 2- or 4-wire synchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[7:4]
1.8 V supply (flash, RAM)
Doc ID 018587 Rev 1
Description
Pinout and pin description
23/207
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