STM32W108C8U63TR STMicroelectronics, STM32W108C8U63TR Datasheet - Page 59
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STM32W108C8U63TR
Manufacturer Part Number
STM32W108C8U63TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108C8U63TR.pdf
(207 pages)
Specifications of STM32W108C8U63TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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STM32W108C8
Note:
Note:
8.1.7
When configured in output mode:
●
●
●
●
●
●
●
Depending on configuration and usage, GPIO_PxOUT and GPIO_PxIN may not have the
same value.
Alternate output mode
In this mode, the output is controlled by an on-chip peripheral instead of GPIO_PxOUT and
may be configured as either push-pull or open-drain. Most peripherals require a particular
output type - I
does not by itself configure a pin, the GPIO_PxCFGH/L registers must be configured
properly for a peripheral's particular needs. As described in
page
addition to GPIO_PxCFGH/L determine which to use.
When configured in alternate output mode:
●
●
●
●
●
●
Depending on configuration and usage, GPIO_PxOUT and GPIO_PxIN may not have the
same value.
Alternate output SPI SCLK mode
SPI master mode SCLK outputs, PB3 (SC1SCLK) or PA2 (SC2SCLK), use a special output
push-pull mode reserved for those signals. Otherwise this mode is identical to alternate
output mode.
Wake monitoring
The GPIO_PxWAKE registers specify which GPIOs are monitored to wake the processor. If
a GPIO's wake enable bit is set in GPIO_PxWAKE, then a change in the logic value of that
GPIO causes the STM32W108C8 to wake from deep sleep. The logic values of all GPIOs
are captured by hardware upon entering sleep. If any GPIO's logic value changes while in
sleep and that GPIO's GPIO_PxWAKE bit is set, then the STM32W108C8 will wake from
deep sleep. (There is no mechanism for selecting a specific rising-edge, falling-edge, or
level on a GPIO: any change in logic value triggers a wake event.) Hardware records the fact
The output drivers are enabled and are controlled by the value written to
GPIO_PxOUT:
In open-drain mode: 0 activates the N-MOS current sink; 1 tri-states the pin.
In push-pull mode: 0 activates the N-MOS current sink; 1 activates the P-MOS current
source.
The internal pull-up and pull-down resistors are disabled.
The Schmitt trigger input is connected to the pin.
Reading GPIO_PxIN returns the input at the pin.
Reading GPIO_PxOUT returns the last value written to the register.
The output drivers are enabled and are controlled by the output of an on-chip
peripheral:
In open-drain mode: 0 activates the N-MOS current sink; 1 tri-states the pin.
In push-pull mode: 0 activates the N-MOS current sink; 1 activates the P-MOS current
source.
The internal pull-up and pull-down resistors are disabled.
The Schmitt trigger input is connected to the pin.
Reading GPIO_PxIN returns the input to the pin.
55, when more than one peripheral can be the source of output data, registers in
2
C requires an open-drain driver, for example - but since using a peripheral
Doc ID 018587 Rev 1
General-purpose input/outputs
Section 8.1.2: Configuration on
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