STM32W108CBU61TR STMicroelectronics, STM32W108CBU61TR Datasheet - Page 124
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STM32W108CBU61TR
Manufacturer Part Number
STM32W108CBU61TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Specifications of STM32W108CBU61TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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General-purpose timers
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PWM edge-aligned mode: up-counting configuration
Up-counting is active when the TIM_DIR bit in the TIMx_CR1 register is low. Refer to
counting mode on page
The following example uses PWM mode 1. The reference PWM signal OCyREF is high as
long as TIMx_CNT < TIMx_CCRy, otherwise it becomes low. If the compare value in
TIMx_CCRy is greater than the auto-reload value in TIMx_ARR, then OCyREF is held at 1.
If the compare value is 0, then OCyREF is held at 0.
PWM waveforms in an example, where TIMx_ARR = 8.
Figure 35. Edge-aligned PWM waveforms (ARR = 8)
PWM edge-aligned mode: down-counting configuration
Down-counting is active when the TIM_DIR bit in the TIMx_CR1 register is high. Refer to
Down-counting mode on page 111
In PWM mode 1, the reference signal OCyREF is low as long as TIMx_CNT > TIMx_CCRy,
otherwise it becomes high. If the compare value in TIMx_CCRy is greater than the auto-
reload value in TIMx_ARR, then OCyREF is held at 1. Zero-percent PWM is not possible in
this mode.
PWM center-aligned mode
Center-aligned mode is active except when the TIM_CMS bits in the TIMx_CR1 register are
00 (all configurations where TIM_CMS is non-zero have the same effect on the
OCyREF/OCy signals). The compare flag is set when the counter counts up, when it counts
down, or when it counts up and down, depending on the TIM_CMS bits configuration. The
direction bit (TIM_DIR) in the TIMx_CR1 register is updated by hardware and must not be
changed by software. Refer to
more information.
109.
Doc ID 16252 Rev 8
Center-aligned mode (up/down counting) on page 112
for more information.
Figure 35
STM32W108CB, STM32W108HB
shows some edge-aligned
Up-
for
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