STM32W108CBU61TR STMicroelectronics, STM32W108CBU61TR Datasheet - Page 151

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STM32W108CBU61TR

Manufacturer Part Number
STM32W108CBU61TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32W108CBU61TR

Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32W108CBU61TR
Manufacturer:
ST
0
STM32W108CB, STM32W108HB
10.3.8
10.3.9
31
15
31
15
30
14
30
14
Bits [15:0] TIM_CNT: Counter value
Bits [3:0] TIM_PSC: Prescaler value
Timer x counter register (TIMx_CNT)
Address offset: 0xE024 (TIM1) and 0xF024 (TIM2)
Reset value:
Timer x prescaler register (TIMx_PSC)
Address offset: 0xE028 (TIM1) and 0xF028 (TIM2)
Reset value:
Bit 5 TIM_CC2P
Bit 4 TIM_CC2E
Bit 1 TIM_CC1P
Bit 0 TIM_CC1E
29
13
29
13
Refer to the CC4P description above.
Refer to the CC43 description above.
Refer to the CC4P description above.
Refer to the CC4E description above.
The prescaler divides the internal timer clock frequency. The counter clock frequency CK_CNT
is equal to fCK_PSC / (2 ^ TIM_PSC). Clock division factors can range from 1 through 32768.
The division factor is loaded into the shadow prescaler register at each update event (including
when the counter is cleared through TIM_UG bit of TMR1_EGR register or through the trigger
controller when configured in reset mode).
28
12
28
12
27
11
27
11
0x0000 0000
0x0000 0000
26
10
26
10
Reserved
25
25
9
9
Doc ID 16252 Rev 8
24
24
8
8
Reserved
TIM_CNT
Reserved
rw
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
General-purpose timers
19
19
3
3
18
18
2
2
TIM_PSC
rw
17
17
1
1
151/209
16
16
0
0

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