Z16FMC28AG20SG Zilog, Z16FMC28AG20SG Datasheet - Page 21
![Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D](/photos/39/69/396954/tqfp-64_sml.jpg)
Z16FMC28AG20SG
Manufacturer Part Number
Z16FMC28AG20SG
Description
Microcontrollers (MCU) 16BIT 128K FL 4KRAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet
1.Z16FMC28AG20_EG.pdf
(341 pages)
Specifications of Z16FMC28AG20SG
Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
0 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z16FMC28AG20SG
Manufacturer:
Zilog
Quantity:
176
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Z16FMC Series Motor Control MCUs
Product Specification
xxi
Table 137. Flash Memory Sector Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
Table 138. Information Area Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Table 139. Flash Command Register (FCMD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
Table 140. Flash Status Register (FSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
Table 141. Flash Control Register (FCTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
Table 142. Flash Sector Protect Register (FSECT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
Table 143. Flash Page Select Register (FPAGE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
Table 144. Option Bits At Program Memory Address 0000H . . . . . . . . . . . . . . . . . . 250
Table 145. Options Bits at Program Memory Address 0001H . . . . . . . . . . . . . . . . . . 251
Table 146. Options Bits at Program Memory Address 0002H . . . . . . . . . . . . . . . . . . 252
Table 147. Options Bits at Program Memory Address 0003H . . . . . . . . . . . . . . . . . . 252
Table 148. IPO Trim 1 (IPOTRIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
Table 149. IPO Trim 2 (IPOTRIM2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
Table 150. ADC Reference Voltage Trim (ADCTRIM) . . . . . . . . . . . . . . . . . . . . . . . 254
Table 151. OCD Baud Rate Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
Table 152. On-Chip Debugger Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
Table 153. Receive Data Register (DBGRXD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272
Table 154. Transmit Data Register (DBGTXD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272
Table 155. Baud Rate Reload Register (DBGBR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Table 156. Line Control Register (DBGLCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Table 157. Status Register (DBGSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
Table 158. Debug Control Register (DBGCTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276
Table 159. OCD Control Register (OCDCTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277
Table 160. OCD Status Register (OCDSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 278
Table 161. Hardware Breakpoint Register (HWBPn) . . . . . . . . . . . . . . . . . . . . . . . . . 279
Table 162. Trace Control Register (TRACECTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . 280
Table 163. Trace Address (TRACEADDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281
Table 164. Recommended Crystal Oscillator Specifications (20 MHz Operation) . . . 283
Table 165. Oscillator Configuration and Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . 288
Table 166. Oscillator Control Register (OSCCTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
Table 167. Oscillator Divide Register (OSCDIV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291
Table 168. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292
Table 169. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
Table 170. POR and VBO Electrical Characteristics and Timing . . . . . . . . . . . . . . . . 297
Table 171. Reset and Stop Mode Recovery Pin Timing . . . . . . . . . . . . . . . . . . . . . . . 298
Table 172. Flash Memory Electrical Characteristics and Timing . . . . . . . . . . . . . . . . 298
PS028702-1210
P R E L I M I N A R Y
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