ZLF645S0P2864G Zilog, ZLF645S0P2864G Datasheet - Page 132
ZLF645S0P2864G
Manufacturer Part Number
ZLF645S0P2864G
Description
Microcontrollers (MCU) 64K Flash 512B RAM 28 pin
Manufacturer
Zilog
Datasheet
1.ZLF645S0P2832G.pdf
(197 pages)
Specifications of ZLF645S0P2864G
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
512 KB
Interface Type
ICP, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIP-28
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
Details
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Table 64. Interrupt Priority Register (IPR)
PS026407-0408
Bit
Field
Reset
R/W
Address
Bit Position
[7:6]
[5]
Interrupt Priority Register
Reserved
X
7
Programming bits for the Interrupt Edge Select are located in the IRQ register (R250),
bit 6 and bit 7.
Table 63. Interrupt Request Register
The Interrupt Priority register (see
priority. Interrupts are divided into three groups of two—Group A, Group B, and Group C.
IPR bits 4, 3, and 0 determine which interrupt group has priority. For example, if interrupts
IRQ5, IRQ1, and IRQ0 occur simultaneously when IPR[4:3,0]=001b, the interrupts are
serviced in the following order: IRQ1, IRQ0, IRQ5.
IPR bits 5, 2, and 1 determine which interrupt within each group has higher priority.
Value
IRQ Bit
7
0
0
1
1
Note: F = Falling Edge; R = Rising Edge.
—
0
1
—
X
6
Description
Reserved
Reads are undefined; writes must be 00b.
Group A Priority (IRQ3, IRQ5)
IRQ5 > IRQ3
IRQ3 > IRQ5
6
0
1
0
1
Group A
Priority
Table 63
W
X
5
Interrupt Edge
IRQ2 (P31)
F
F
R
R/F
Bank Independent: F9h; Linear: 0F9h
provides the configuration.
Group Priority
X
4
[2:1]
W
Table
IRQ0 (P32)
F
R
F
R/F
X
3
64) defines which interrupt holds the highest
Group B
Priority
W
X
2
ZLF645 Series Flash MCUs
Group C
Priority
W
X
1
Product Specification
Interrupt Priority Register
Group Priority
[0]
W
X
0
124
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