ZLF645S0P2864G Zilog, ZLF645S0P2864G Datasheet - Page 42

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ZLF645S0P2864G

Manufacturer Part Number
ZLF645S0P2864G
Description
Microcontrollers (MCU) 64K Flash 512B RAM 28 pin
Manufacturer
Zilog
Datasheet

Specifications of ZLF645S0P2864G

Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
512 KB
Interface Type
ICP, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIP-28
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
 Details
Table 17. Port 2 Mode Register (P2M)
PS026407-0408
Bit
Field
Reset
R/W
Address
Bit Position
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Port 2 Mode Register
Note:
Definition
P27 I/O
The Port 2 Mode register (see
Bit 0 of the Port 3 Mode register determines whether the output drive is push/pull or
open-drain.
Port 2 Mode register is not reset after a Stop Mode Recovery.
Value
W
7
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Definition
Description
Defines P27 as output.
Defines P27 as input.
Defines P26 as output.
Defines P26 as input.
Defines P25 as output.
Defines P25 as input.
Defines P24 as output.
Defines P24 as input.
Defines P23 as output.
Defines P23 as input.
Defines P22 as output.
Defines P22 as input.
Defines P21 as output.
Defines P21 as input.
Defines P20 as output.
Defines P20 as input.
P26 I/O
W
6
1
Definition
P25 I/O
W
Bank Independent: F6h; Linear: 0F6h
5
1
Table
Definition
P24 I/O
W
17) determines the I/O direction of each bit on Port 2.
4
1
Definition
P23 I/O
W
3
1
Definition
P22 I/O
ZLF645 Series Flash MCUs
W
2
1
Product Specification
Definition
P21 I/O
Port 2 Mode Register
W
1
1
Definition
P20 I/O
W
0
1
34

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