ZLF645S0P2864G Zilog, ZLF645S0P2864G Datasheet - Page 33

• Manufacturer Part Number: ZLF645S0P2864G
• Description: Microcontrollers (MCU) 64K Flash 512B RAM 28 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2864G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-28
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

ZLF645 Series Flash MCUs
Product Specification
25
COMP1 is used. The reference voltage for COMP1 is P30 (P
). When in ANALOG
REF1
mode, P30 cannot be read as a digital input when the CPU reads bit 0 of the Port 3 register;
such reads always return a value of 1.
Also, when in ANALOG mode, P31 cannot be used as a Stop Mode Recovery source, as in
STOP mode the comparator is disabled and its output will not toggle. The programming of
bit 2 of the P3M register takes precedence over the programming of Bit 1 in determining
the function of P31. If both bits are set, P31 functions as an IR learning amplifier instead of
an analog comparator. As displayed in
Figure 9
the output of the function selected for P31
can be used as a source for IRQ2 interrupt assertion. The IRQ2 interrupt can be configured
based upon detecting a rising, falling, or edge-triggered input change using Bits 6 and 7 of
the IRQ register. The P31 output stage signal also goes to the Counter/Timer edge detec-
tion circuitry in the same way that P20 does.
P32 can be used as an interrupt, analog comparator, UART receiver, normal digital input
and as Stop Mode Recovery source. When bit 6 of UCTL register is set, P32 functions as a
receive input for the UART. When bit 1 of the P3M register is set, thereby placing Port 3
into ANALOG mode, P32 functions as an analog comparator, COMP2. The reference
voltage for COMP2 is P33 (P
). P32 can be used as a rising, falling or edge-triggered
REF2
interrupt, IRQ0, using IRQ register bits 6 and 7. If UART receiver interrupts are not
enabled, the UART receive interrupt is used as the source of interrupts for IRQ0 instead of
P32. When in ANALOG mode P32 cannot be used as SMR source because the compara-
tors are turned OFF in STOP mode.
When in ANALOG mode, P33 cannot be read by the CPU as a digital input through bit 3
of the Port 3 register. In this case, a read of bit 3 of the Port 3 register indicates whether
Stop Mode Recovery condition exists. Reading a value of 0 indicates an SMR condition; if
the ZLF645 MCU is in STOP mode, it will exit STOP mode. Reading a value of 1 indi-
cates that no condition exists to exit the ZLF645 MCU from STOP mode.
Additionally, when in ANALOG mode, P33 cannot be used as an interrupt source. Instead,
the existence of a SMR condition can generate an interrupt, if enabled. P33 can be used as
a falling-edge interrupt, IRQ1, when not in ANALOG mode. IRQ1 is also used as the
UART T
interrupt and the UART BRG interrupt. Only one source is active at a time. If
X
bit 7 and bit 5 of UCTL are set to 1, IRQ1 will transmit an interrupt when the Transmit
Shift register is empty. If bits 0 and 5 of UCTL are set to 1 and bit 6 of UCTL is cleared to
0, the BRG interrupts will activate IRQ1.
Note:
Comparators and the IR amplifier are powered down by entering STOP mode.
For P30:P33 to be used as a Stop Mode Recovery source during STOP mode, these inputs
must be placed into DIGITAL mode. When in ANALOG mode, do not configure any Port 3
input as a SMR source. The configuration of these inputs must be re-initialized after Stop
Mode Recovery or POR.
PS026407-0408
Port 3