ZLF645S0P2864G Zilog, ZLF645S0P2864G Datasheet - Page 99

• Manufacturer Part Number: ZLF645S0P2864G
• Description: Microcontrollers (MCU) 64K Flash 512B RAM 28 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2864G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-28
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

Table 46. UART Control Register (UCTL)
PS026407-0408
Bit
Field
Reset
R/W
Address
Bit Position
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
UART Baud Rate Generator Constant Register
Transmitter
Enable
R/W
Value
The UART baud rate generator determines the frequency at which UART data is received
and transmitted. This baud rate is determined by the following equation:
UART Data Rate (bps)
7
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
Transmitter disabled.
Transmitter enabled.
Receiver disabled.
Receiver enabled.
UART Interrupts disabled.
UART Interrupts enabled.
Parity disabled.
Parity enabled.
Even parity selected.
Odd parity selected.
No break is sent.
Send Break (force Tx output to 0).
One stop bit.
Two stop bits.
Baud Rate Generator —When the transmitter and receiver are disabled, the
BRG can be used as an additional timer. When setting this bit, clear bits [7:6] in
this register. Also set bit [5] if an interrupt is required when the BRG is reloaded.
BRG used as Baud Rate Generator for UART.
BRG used as timer.
Receiver
Enable
R/W
6
0
Interrupts
Enable
UART
R/W
Bank Independent: F3h; Linear: 0F3h
5
0
=
16 x UART Baud Rate Divisor Value (BCNST)
Enable
Parity
R/W
4
0
System Clock Frequency (Hz)
Select
Parity
R/W
UART Baud Rate Generator Constant Register
3
0
Break
Send
ZLF645 Series Flash MCUs
R/W
2
0
Product Specification
Stop Bits Baud Rate
R/W
1
0
Generator
R/W
0
0
91