ST72T631K4M1 STMicroelectronics, ST72T631K4M1 Datasheet - Page 56

no-image

ST72T631K4M1

Manufacturer Part Number
ST72T631K4M1
Description
Microcontrollers (MCU) OTP EPROM 16K USB/SC
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72T631K4M1

Data Bus Width
8 bit
Program Memory Type
EPROM
Program Memory Size
16 KB
Data Ram Size
512 B
Interface Type
I2C, SCI, USB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
SO-34
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72T631K4M1
Quantity:
28
Part Number:
ST72T631K4M1
Manufacturer:
SIEMENS
Quantity:
5 510
Part Number:
ST72T631K4M1
Manufacturer:
ST
0
Part Number:
ST72T631K4M1
Manufacturer:
ST
Quantity:
20 000
Part Number:
ST72T631K4M1/L4M1
Manufacturer:
ST
0
ST7263
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
5.5.4 Functional Description
The block diagram of the Serial Control Interface,
is shown in Figure 1. It contains 4 dedicated regis-
ters:
– Two control registers (CR1 & CR2)
– A status register (SR)
– A baud rate register (BRR)
Refer to the register descriptions in
for the definitions of each bit.
5.5.4.1 Serial Data Format
Word length may be selected as being either 8 or 9
bits by programming the M bit in the CR1 register
(see Figure 1).
Figure 35. Word Length Programming
56/109
9-bit Word length (M bit is set)
Start
Bit
8-bit Word length (M bit is reset)
Start
Bit
Bit0
Bit0
Bit1
Bit1
Break Frame
Data Frame
Idle Frame
Break Frame
Data Frame
Idle Frame
Bit2
Bit2
Section 0.1.7
Bit3
Bit3
Bit4
Bit4
Bit5
Bit5
The TDO pin is in low state during the start bit.
The TDO pin is in high state during the stop bit.
An Idle character is interpreted as an entire frame
of “1”s followed by the start bit of the next frame
which contains data.
A Break character is interpreted on receiving “0”s
for some multiple of the frame period. At the end of
the last break frame the transmitter inserts an ex-
tra “1” bit to acknowledge the start bit.
Transmission and reception are driven by their
own baud rate generator.
Bit6
Bit6
Possible
Bit7
Parity
Bit7
Bit
Possible
Parity
Bit8
Bit
Stop
Bit
Stop
Bit
Extra
Start
Next
Start
Bit
Bit
’1’
Extra
Next Data Frame
Next
Start
Start
Bit
Bit
’1’
Start
Bit
Next Data Frame
Start
Bit

Related parts for ST72T631K4M1