ST72T631K4M1 STMicroelectronics, ST72T631K4M1 Datasheet - Page 86

• Manufacturer Part Number: ST72T631K4M1
• Description: Microcontrollers (MCU) OTP EPROM 16K USB/SC
• Manufacturer: STMicroelectronics

Specifications of ST72T631K4M1

• Data Bus Width: 8 bit
• Program Memory Type: EPROM
• Program Memory Size: 16 KB
• Data Ram Size: 512 B
• Interface Type: I2C, SCI, USB
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SO-34
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: No

ST7263
8-BIT A/D CONVERTER (ADC) (Cont’d)
5.8.6 Register Description
CONTROL/STATUS REGISTER (CSR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7 = COCO Conversion Complete
This bit is set by hardware. It is cleared by soft-
ware reading the result in the DR register or writing
to the CSR register.
0: Conversion is not complete.
1: Conversion can be read from the DR register.
Bit 6 = Reserved. Must always be cleared.
Bit 5 = ADON A/D converter On
This bit is set and cleared by software.
0: A/D converter is switched off.
1: A/D converter is switched on.
Note: A typical 30 µs delay time is necessary for
the ADC to stabilize when the ADON bit is set.
Bit 4 = Reserved. Forced by hardware to 0.
Bit 3 = Reserved. Must always be cleared.
Bits 2:0: CH[2:0] Channel Selection
These bits are set and cleared by software. They
select the analog input to convert.
86/109
COCO
7
-
ADON
0
-
CH2
CH1
CH0
0
Table 21. Channel Selection
*IMPORTANT NOTE: The number of pins AND
the channel selection vary according to the device.
REFER TO THE DEVICE PINOUT).
DATA REGISTER (DR)
Read Only
Reset Value: 0000 0000 (00h)
Bit 7:0 = AD[7:0] Analog Converted Value
This register contains the converted analog value
in the range 00h to FFh.
Reading this register resets the COCO flag.
AD7
7
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Pin*
AD6
AD5
CH2
AD4
0
0
0
0
1
1
1
1
AD3
CH1
0
0
1
1
0
0
1
1
AD2
AD1
CH0
0
1
0
1
0
1
0
1
AD0
0