ADV7181BBCPZ Analog Devices Inc, ADV7181BBCPZ Datasheet - Page 79

IC ENCODER SDTV MULTI 64-LFCSP

ADV7181BBCPZ

Manufacturer Part Number
ADV7181BBCPZ
Description
IC ENCODER SDTV MULTI 64-LFCSP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet

Specifications of ADV7181BBCPZ

Applications
Recorders, Set-Top Boxes
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Resolution (bits)
9bit
Input Format
Analog
Output Format
Digital
Adc Sample Rate
54MSPS
No. Of Input Channels
6
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7181BBCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Subaddress
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
Register
Chroma
Gain
Control 1
Chroma
Gain
Control 2
Luma Gain
Control 1
Luma Gain
Control 2
VS and
FIELD
Control 1
Vsync Field
Control 2
Vsync Field
Control 3
Bit Description
CMG[11:8]. Chroma manual gain can
be used to program a desired
manual chroma gain. Reading back
from this register in AGC mode gives
the current gain.
Reserved.
CAGT[1:0]. Chroma automatic gain
timing allows adjustment of the
chroma AGC tracking speed.
CMG[7:0]. Chroma manual gain
lower 8 bits. See CMG[11:8] for
description.
LMG[11:8]. Luma manual gain can
be used to program a desired
manual chroma gain, or to read
back the actual gain value used.
Reserved.
LAGT[1:0]. Luma automatic gain
timing allows adjustment of the
luma AGC tracking speed.
LMG[7:0]. Luma manual gain can be
used to program a desired manual
chroma gain or read back the actual
used gain value.
Reserved.
HVSTIM. Selects where the VS signal
is asserted within a line of video.
NEWAVMODE. Sets the EAV/SAV
mode.
Reserved.
Reserved.
VSBHE.
VSBHO.
Reserved.
VSEHE.
VSEHO.
Rev. B | Page 79 of 100
7 6
0 0
0 1
1 0
1 1
0 0
0 0
0 1
1 0
1 1
x x
0 0
0
1
0
1
0
1
0
1
5
1
0
1
x
0
0
0
4 3
1
0 0
1
x
0
1
0 0
0 0
Bits
0
x
x
0
1
2
1
0
x
x
0
0
1
1
0
0
x
x
1
0
0
0
0
0
x
x
0
1
0
Comments
Set to 1
Slow (TC = 2 sec)
Medium (TC = 1 sec)
Fast (TC = 0.2 sec)
Adaptive
CMG[11:0] = 750d; gain is
1 in NTSC
CMG[11:0] = 741d; gain is
1 in PAL
LAGC[1:0] settings decide
in which mode LMG[11:0]
operates
Set to 1
Slow (TC = 2 sec)
Medium (TC = 1 sec)
Fast (TC = 0.2 sec)
Adaptive
LMG[11:0] = 1234d; gain is
1 in NTSC LMG[11:0] =
1266d; gain is 1 in PAL
Set to default
Start of line relative to HSE
Start of line relative to HSB
EAV/SAV codes generated
to suit ADI encoders
Manual VS/field position
controlled by registers
0x32, 0x33, and 0xE5–0xEA
Set to default
Set to default
VS goes high in the middle
of the line (even field)
VS changes state at the
start of the line (even field)
VS goes high in the middle
of the line (odd field)
VS changes state at the
start of the line (odd field)
Set to default
VS goes low in the middle
of the line (even field)
VS changes state at the
start of the line (even
field)
VS goes low in the middle
of the line (odd field)
VS changes state at the
start of the line (odd field)
Notes
CAGC[1:0] settings
decide in which
mode CMG[11:0]
operates.
Has an effect only if
CAGC[1:0] is set to
auto gain (10).
Min value is 0 d
(G = –60 dB)
Max value is 3750
(Gain = 5).
Has an effect only if
LAGC[1:0] is set to
auto gain (001, 010,
011, or 100).
Min value
NTSC 1024 (G = 0.85),
PAL (G = 0.81).
Max value
NTSC 2468 (G = 2),
PAL = 2532 (G = 2).
HSB = Hsync begin.
NEWAVMODE bit
must be set high.
NEWAVMODE bit
must be set high.
HSE = Hsync end.
ADV7181B

Related parts for ADV7181BBCPZ