UDA1380TTN2 NXP Semiconductors, UDA1380TTN2 Datasheet - Page 12

• Manufacturer Part Number: UDA1380TTN2
• Manufacturer: NXP Semiconductors

Specifications of UDA1380TTN2

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
8.1.2
Figure 5 shows the main clock distribution for the SYSCLK domain and the WSPLL clock domain.
For power saving reasons each clock signal inside the system must be controlled and enabled via a separate bit in the
L3-bus and I
The DAC part of the UDA1380 can operate from 8 to 100 kHz sampling frequency (f
the ADC part can run from 8 to 55 kHz.
2004 Apr 22
handbook, full pagewidth
Stereo audio coder-decoder
for MD, CD and MP3
C
LOCK DISTRIBUTION
2
C-bus registers (ADC_CLK).
SYSCLK
WSI
Fig.5 Clock routing for the main blocks inside the coder-decoder.
CLK_DIV
WSPLL
256f s
256/384/512/768f s
128f s
128f s
12
128f s
128f s
enable clock
enable clock
ADC_CLK
DAC_CLK
enable
enable
clock
clock
FSDAC
OUTPUT BLOCK
INTERPOLATOR
INTERPOLATOR
ADC
MGU528
INPUT BLOCK
s
L3 or I
L3 or I
DECIMATOR
DECIMATOR
). This applies to the DAC part only;
REGISTER
REGISTER
I
I
2
2
S-BUS
S-BUS
2
2
C-BUS
C-BUS
Product specification
UDA1380