UDA1380TTN2 NXP Semiconductors, UDA1380TTN2 Datasheet - Page 29
UDA1380TTN2
Manufacturer Part Number
UDA1380TTN2
Description
Manufacturer
NXP Semiconductors
Datasheet
1.UDA1380TTN2.pdf
(68 pages)
Specifications of UDA1380TTN2
Lead Free Status / Rohs Status
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NXP Semiconductors
11 REGISTER MAPPING
Table 15 Register map of control settings (write)
Table 16 Register map of status bits (read-out)
2004 Apr 22
System settings (running at the L3-bus or I
Interpolation filter (running at 128f
Decimator (running at 128f
Software reset
Headphone driver and interpolation filter
Decimator
Stereo audio coder-decoder
for MD, CD and MP3
REGISTER
REGISTER
ADDRESS
ADDRESS
7FH
00H
01H
02H
03H
04H
10H
11H
12H
13H
14H
20H
21H
22H
23H
18H
28H
evaluation modes, WSPLL settings, clock divider and clock selectors
I
power control settings
analog mixer settings
headphone amplifier settings
master volume control
mixer volume control
mode selection, left and right bass boost, and treble settings
master mute, channel 1 and channel 2 de-emphasis and channel mute
mixer, silence detector and interpolation filter oversampling settings
decimator volume control
PGA settings and mute
ADC settings
AGC settings
restore L3-default values
interpolation filter status
decimator status
2
S-bus I/O settings
s
decimator clock)
s
interpolator clock)
2
C-bus clock itself)
29
FUNCTION
FUNCTION
Product specification
UDA1380
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