MCP23016-I/SP Microchip Technology, MCP23016-I/SP Datasheet - Page 15

• Manufacturer Part Number: MCP23016-I/SP
• Description: IC I/O EXPANDER I2C 16B 28SDIP
• Manufacturer: Microchip Technology

Specifications of MCP23016-I/SP

• Package / Case: 28-DIP (0.300", 7.62mm)
• Interface: I²C
• Number Of I /o: 16
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Includes: POR
• Logic Family: MCP23016
• Propagation Delay Time: 50 ns
• Operating Supply Voltage: 2 V to 5.5 V
• Power Dissipation: 1 W
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 4.5 V to 5.5 V
• Logic Type: I/O Expander
• Maximum Clock Frequency: 400 KHz
• Maximum Operating Frequency: 3.4 MHz
• Mounting Style: Through Hole
• Output Current: 25 mA
• Output Voltage: 4.5 V
• Chip Configuration: 16 Bit
• Bus Frequency: 400kHz
• Ic Interface Type: I2C
• No. Of I/o's: 16
• Supply Voltage Range: 2V To 5.5V
• Digital Ic Case Style: DIP
• No. Of Pins: 28
• Ic Function: I/O Expander
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

1.9.3
To read a MCP23016 register, the Master needs to
follow the requirements shown in Figure 1-6. First, the
device is selected by sending the slave address and
setting the R/W bit to logic ‘0’. The command byte is
sent after the address and determines which register
will be read. A restart condition is generated and the
device address is sent again with the R/W bit set to
logic ‘1’. The data register defined by the command
byte will be sent first, followed by the other register in
the register pair. The logic for register selection is the
same as explained in Write mode (Section 1.9.2,
“Writing the Registers”).
The falling edge of the ninth clock initiates the register
read action. The SCL clock will be held low while the
data is read from the register and is transferred to the
I
block.
The MCP23016 holds the clock low after the falling
edge of the ninth clock pulse. The configuration
registers (or port control registers) are read and the
value is stored. Finally, the clock is released to enable
the next transmission.
There is no limitation on the number of data bytes in
one read transmission. Figure 1-8 shows the case of
multiple byte read in one read operation. In this case,
the multiple writes are made to the same data pair.
© 2007 Microchip Technology Inc.
2
C bus control block by the Serializer/Deserializer
Note:
READING THE REGISTERS
The bus must remain free until after the
ninth clock pulse for a minimum of 12 µs
(see Table 2-5 and Figure 2-4).
FIGURE 1-6:
READ FROM
CONFIGURATION
REGISTER
MCP23016
DS20090C-page 15