BUK9Y30-75B/C2,115 NXP Semiconductors, BUK9Y30-75B/C2,115 Datasheet
BUK9Y30-75B/C2,115
Specifications of BUK9Y30-75B/C2,115
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BUK9Y30-75B/C2,115 Summary of contents
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... BUK9Y30-75B N-channel TrenchMOS logic level FET Rev. 04 — 10 April 2008 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. ...
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... °C; see T Figure ° ≤ 10 μs; pulsed ° ≤ Ω sup °C; unclamped T j(init) see Figure 3 Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET Graphic symbol mbb076 Min Max - -15 15 and Figure 4 - 137 - 85 -55 175 ...
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... Fig 2. Normalized total power dissipation as a function of mounting base temperature (1) (A) 10 ( Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET 03na19 50 100 150 T (° tot = × 100 % P tot ( 25°C ) 03np81 10 (ms) AV © NXP B.V. 2008. All rights reserved. 200 ...
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... Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK9Y30-75B_4 Product data sheet / Conditions see Figure Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET 03no14 = 10 μ 100 μ 100 (V) DS Min Typ Max - - 1.8 03nm01 ...
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... see Figure 12 and ° ° see Figure /dt = -100 A/μ - ° °C; see T Figure ° MHz see Figure 15 Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET Min Typ Max 0 1 500 - 0. 100 - 2 100 - - 0.85 1.2 - 101 - - 115 - - ...
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... T j 03no10 − (A) −2 10 −3 10 −4 10 −5 10 − ( °C;V j Fig 7. Sub-threshold drain current as a function of gate-source voltage Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET Min Typ Max - 106 - - 03ng53 min typ max ( © NXP B.V. 2008. All rights reserved. ...
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... V GS(th) (V) 2.0 1.5 1.0 0.5 0 − ( A;V D Fig 11. Gate-source threshold voltage as a function of junction temperature Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET 03no11 V ( 7.0 5.0 4.2 4.0 3.8 3.6 3.4 3.2 3.0 2.8 2 ...
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... C (pF) 2000 1500 1000 500 0 − (nC Fig 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET 03nq03 - 100 140 180 T (° DSon DSon ( 25°C ) 03no13 C iss C oss C rss ...
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... Fig 16. Source current as a function of source-drain voltage; typical values BUK9Y30-75B_4 Product data sheet 100 175 ° 0.3 0.6 0.9 Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET 03no06 = 25 °C 1.2 V (V) SD © NXP B.V. 2008. All rights reserved ...
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... D 1 (1) ( max 2.2 0.9 0.25 0.30 4.10 5.0 4.20 2.0 0.7 0.19 0.24 3.80 4.8 REFERENCES JEDEC JEITA MO-235 Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET detail ( 3.3 6.2 0.85 1.3 1.3 1.27 0.25 3.1 5.8 0.40 0.8 ...
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... Product data sheet Data sheet status Product data sheet 13: updated Product data sheet Product data sheet Product data sheet Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET Change notice Supersedes - BUK9Y30-75B_3 - BUK9Y30-75B_2 - BUK9Y30_75B- © NXP B.V. 2008. All rights reserved ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 04 — 10 April 2008 BUK9Y30-75B N-channel TrenchMOS logic level FET © NXP B.V. 2008. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: BUK9Y30-75B_4 All rights reserved. Date of release: 10 April 2008 ...