AD9824KCP Analog Devices Inc, AD9824KCP Datasheet - Page 21

• Manufacturer Part Number: AD9824KCP
• Description: IC CCD SIGNAL PROC 14BIT 48LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 14-Bitr

Specifications of AD9824KCP

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 30MSPS
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 14b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LFCSP EP
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

Internal Power-On Reset Circuitry
After power-on, the AD9824 will automatically reset all internal
registers and perform internal calibration procedures. This takes
approximately 1 ms to complete. During this time, normal
clock signals and serial write operations may occur. However,
serial register writes will be ignored until the internal reset opera-
tion is completed.
Grounding and Decoupling Recommendations
As shown in Figure 33, a single ground plane is recommended
for the AD9824. This ground plane should be as continuous as
possible, particularly around Pins 25 through 39. This will
ensure that all analog decoupling capacitors provide the lowest
possible impedance path between the power and bypass pins and
REV. 0
OUTPUTS
DATA
14
Figure 33. Recommended Circuit Configuration for CCD-Mode
SUPPLY
DRIVER
INTERFACE
(MSB) D13
SERIAL
3V
D10
D11
D12
D2
D3
D4
D5
D6
D7
D8
D9
0.1 F
10
11
12
1
2
3
4
5
6
7
8
9
3
48 47 46 45 44
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
IDENTIFIER
ANALOG SUPPLY
0.1 F
(Not to Scale)
3V
AD9824
TOP VIEW
43 42 41 40
ANALOG SUPPLY
–21–
3V
their respective ground pins. All decoupling capacitors should
be located as close as possible to the package pins. A single clean
power supply is recommended for the AD9824, but a separate
digital driver supply may be used for DRVDD (Pin 13). DRVDD
should always be decoupled to DRVSS (Pin 14), which should
be connected to the analog ground plane. Advantages of using
a separate digital driver supply include using a lower voltage
(2.7 V) to match levels with a 2.7 V ASIC, and reducing digital
power dissipation and potential noise coupling. If the digital
outputs (Pins 1–12) must drive a load larger than 20 pF, buff-
ering is recommended to reduce digital code transition noise.
Alternatively, placing series resistors close to the digital out-
put pins may also help reduce noise.
39 38
37
0.1 F
1.0 F
1.0 F
36
35
34
33
32
31
30
29
28
27
26
25
8
AUX1IN
AVSS
AUX2IN
AVDD2
BYP3
NC
CCDIN
BYP2
BYP1
AVDD1
AVSS
AVSS
CLOCK
INPUTS
NC = NO CONNECT
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
3V
ANALOG SUPPLY
3V
ANALOG SUPPLY
CCD SIGNAL
AD9824