DS33Z11+ Maxim Integrated Products, DS33Z11+ Datasheet - Page 124
![IC MAPPER ETHERNET 169-CSBGA](/photos/6/93/69376/169-csbga_21-0354_sml.jpg)
DS33Z11+
Manufacturer Part Number
DS33Z11+
Description
IC MAPPER ETHERNET 169-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33Z11.pdf
(172 pages)
Specifications of DS33Z11+
Applications
Data Transport
Interface
SPI/Parallel
Voltage - Supply
1.8V, 3.3V
Package / Case
169-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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determine the byte location of the threshold. Note that the receive queue is for data that was received from the
Ethernet Interface to be sent to the Serial Interface.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: Receive FIFO Overflow Interrupt Enable (RFOVFIE) If this bit is set, the interrupt is enabled for
RFOVFLS.
Bit 2: Receive Queue Overflow Interrupt Enable (RQVFIE) If this bit is set, the interrupt is enabled for
RQOVFLS.
Bit 1: Receive Queue Crosses Low Threshold Interrupt Enable (RQLTIE) If this bit is set, the watermark
interrupt is enabled for RQLTS.
Bit 0: Receive Queue Crosses High Threshold Interrupt Enable (RQHTIE) If this bit is set, the watermark
interrupt is enabled for RQHTS.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: Receive FIFO Overflow latched Status (RFOVFLS) This bit is set if the receive FIFO overflows for the
data to be transmitted from the MAC to the SDRAM.
Bit 2: Receive Queue Overflow Latched Status (RQOVFLS) This bit is set if the receive queue has overflowed.
This register is cleared after a read.
Bit 1: Receive Queue for Connection Crossed High Threshold Latched Status (RQHTLS) This bit is set if the
receive queue crosses the high Watermark. This register is cleared after a read.
Bit 0: Receive Queue for Connection Crossed Low Threshold latched status (RQLTLS) This bit is set if the
receive queue crosses the low Watermark. This register is cleared after a read.
Note the bit order differences in the high/low threshold indications in SU.QCRLS and the interrupt enables in
SU.QRIE.
7
-
-
7
0
-
6
-
-
6
0
-
SU.QRIE
Receive Queue Cross Threshold enable
15Ch
SU.QCRLS
Queue Cross Threshold Latched Status
15Dh
5
-
-
5
0
-
4
-
124 of 172
-
4
0
-
RFOVFLS
RFOVFIE
3
-
3
0
RQOVFLS
RQVFIE
2
-
2
0
RQHTLS
RQLTIE
1
-
1
0
RQLTLS
RQHTIE
0
0
0
-
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