DS33Z11+ Maxim Integrated Products, DS33Z11+ Datasheet - Page 77

IC MAPPER ETHERNET 169-CSBGA

DS33Z11+

Manufacturer Part Number
DS33Z11+
Description
IC MAPPER ETHERNET 169-CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33Z11+

Applications
Data Transport
Interface
SPI/Parallel
Voltage - Supply
1.8V, 3.3V
Package / Case
169-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Bit 4: Serial Interface 1 TX Interrupt Status (LINE1TIS) This bit is set if Serial Interface 1 Transmit has an
enabled interrupt generating event. Serial Interface interrupts consist of HDLC interrupts and X.86 interrupts.
Bit 0: Serial Interface 1 RX Interrupt Status (LINER1IS) This bit is set if Serial Interface 1 Receive has an
enabled interrupt generating event. Serial Interface interrupts consist of HDLC interrupts and X.86 interrupts.
Bit 0: Ethernet Interface 1 Interrupt Enable (SUB1IE) Setting this bit to 1 enables an interrupt on SUB1S.
Bit 0: Ethernet Interface 1 Interrupt Status (SUB1IS) This bit is set to 1 if Ethernet Interface 1 has an enabled
interrupt generating event. The Ethernet Interface consists of the MAC and The RMII/MII port.
Bit #
Name
Default
Bit #
Name
Default
Bit #
Name
Default
Register Name:
Register Description:
Register Address:
Register Name:
Register Description:
Register Address:
Register Name:
Register Description:
Register Address:
0
7
0
7
0
7
-
-
-
6
0
6
0
6
0
-
-
-
GL.LIS
Global Serial Interface Interrupt Status
GL.SIE
Global Ethernet Interface Interrupt Enable
GL.SIS
Global Ethernet Interface Interrupt Status
07h
08h
09h
5
0
0
5
0
5
-
-
-
77 of 172
LIN1TIS
4
0
0
4
0
4
-
-
3
0
3
0
3
0
-
-
-
2
0
2
0
2
0
-
-
-
1
0
1
0
1
0
-
-
-
LIN1RIS
SUB1IE
SUB1IS
0
0
0
0
0
0

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