PI7C8154ANAE Pericom Semiconductor, PI7C8154ANAE Datasheet - Page 98

• Manufacturer Part Number: PI7C8154ANAE
• Description: IC PCI-PCI BRIDGE ASYNC 304-PBGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8154ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 304-BGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.1.58
14.1.59
14.1.60
14.1.61
14.1.62
PPB SUPPORT EXTENSIONS REGISTER – OFFSET E0h
DATA REGISTER – OFFSET E0h
CAPABILITY ID REGISTER – OFFSET E4h
NEXT POINTER REGISTER – OFFSET E4h
HOT SWAP CONTROL AND STATUS REGISTER – OFFSET E4h
Bit
12:9
14:13
15
Bit
21:16
22
23
Bit
31:24
Bit
7:0
Bit
15:8
Bit
16
17
18
19
Data Select
Data Scale
Reserved
Function
PME status
Function
B2_B3
Bus Power/Clock
Control Enable
Function
Data
Function
Capability ID
Function
Next Pointer
Function
Device Hiding
ENUM# Signal
Mask
Pending Insertion
/ Extraction
LED on/off
Type
R/O
R/O
R/O
Type
R/O
R/O
R/O
Type
R/O
Type
R/O
Type
R/O
Type
R/W
R/W
R/O
R/W
Page 98 of 114
Description
Read as 0 as the data register is not implemented.
Read as 0 as the data register is not implemented.
Read as 0 as the PME# pin is not implemented.
Description
Reserved. Reset to 0
B2_B3 Support for D3
as a logic level 1 to indicate that the secondary bus clock outputs will be
stopped and driven LOW when the device is placed in D3
undefined when BPCCE is read as 0.
Bus Power / Clock Control Enable: When the BPCCE pin is tied
HIGH, this bit is read as a 1 to indicate that the bus power/clock control
mechanism is enabled. When the BPCCE pin is tied LOW, this bit is
read as a 0 to indicate that the bus power / clock control mechanism is
disabled.
Description
Data Register: Register is not implemented and is read as 00h.
Reset to 0.
Description
Read as 06h to indicate these are CompactPCI Hot Swap registers
Description
Read as 00h to indicate end of pointer
Description
0: Device hiding not armed
1: Device hiding armed
Reset to 0
0: Mask ENUM# signal
1: Enable ENUM# signal
Reset to 0
0: INS is not armed and neither INS nor EXT has a value of 1
1: either INS or EXT has a value of 1 or INS is armed
Reset to 0
0: LED on
1: LED off
Reset to 0
HOT
: When BPCCE is read as 1, this bit is driven
ASYNCHRONOUS 2-PORT
DEC 2009 REVISION 1.02
PCI-to-PCI BRIDGE
Advance Information
HOT
. This bit is
PI7C8154A